2023-06-28 11:07:14 +08:00
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/* Copyright 2021-2023 QMK
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2021-12-27 18:10:07 +08:00
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "bootloader.h"
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2023-06-28 11:07:14 +08:00
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#include "util.h"
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2021-12-27 18:10:07 +08:00
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#include <ch.h>
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#include <hal.h>
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#include "wait.h"
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2023-06-28 11:07:14 +08:00
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#ifndef STM32_BOOTLOADER_RAM_SYMBOL
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# define STM32_BOOTLOADER_RAM_SYMBOL __ram0_end__
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#endif
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extern uint32_t STM32_BOOTLOADER_RAM_SYMBOL;
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2021-12-27 18:10:07 +08:00
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#ifndef STM32_BOOTLOADER_DUAL_BANK
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# define STM32_BOOTLOADER_DUAL_BANK FALSE
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#endif
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#if STM32_BOOTLOADER_DUAL_BANK
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2023-01-31 03:03:30 +08:00
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# include "gpio.h"
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2021-12-27 18:10:07 +08:00
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# ifndef STM32_BOOTLOADER_DUAL_BANK_GPIO
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# error "No STM32_BOOTLOADER_DUAL_BANK_GPIO defined, don't know which pin to toggle"
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# endif
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# ifndef STM32_BOOTLOADER_DUAL_BANK_POLARITY
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# define STM32_BOOTLOADER_DUAL_BANK_POLARITY 0
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# endif
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# ifndef STM32_BOOTLOADER_DUAL_BANK_DELAY
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2022-05-31 14:20:10 +08:00
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# define STM32_BOOTLOADER_DUAL_BANK_DELAY 100
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2021-12-27 18:10:07 +08:00
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# endif
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2021-12-27 18:20:52 +08:00
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__attribute__((weak)) void bootloader_jump(void) {
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2021-12-27 18:10:07 +08:00
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// For STM32 MCUs with dual-bank flash, and we're incapable of jumping to the bootloader. The first valid flash
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// bank is executed unconditionally after a reset, so it doesn't enter DFU unless BOOT0 is high. Instead, we do
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// it with hardware...in this case, we pull a GPIO high/low depending on the configuration, connects 3.3V to
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// BOOT0's RC charging circuit, lets it charge the capacitor, and issue a system reset. See the QMK discord
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// #hardware channel pins for an example circuit.
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palSetPadMode(PAL_PORT(STM32_BOOTLOADER_DUAL_BANK_GPIO), PAL_PAD(STM32_BOOTLOADER_DUAL_BANK_GPIO), PAL_MODE_OUTPUT_PUSHPULL);
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# if STM32_BOOTLOADER_DUAL_BANK_POLARITY
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palSetPad(PAL_PORT(STM32_BOOTLOADER_DUAL_BANK_GPIO), PAL_PAD(STM32_BOOTLOADER_DUAL_BANK_GPIO));
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# else
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palClearPad(PAL_PORT(STM32_BOOTLOADER_DUAL_BANK_GPIO), PAL_PAD(STM32_BOOTLOADER_DUAL_BANK_GPIO));
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# endif
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// Wait for a while for the capacitor to charge
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2022-05-31 14:20:10 +08:00
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wait_ms(STM32_BOOTLOADER_DUAL_BANK_DELAY);
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2021-12-27 18:10:07 +08:00
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// Issue a system reset to get the ROM bootloader to execute, with BOOT0 high
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NVIC_SystemReset();
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}
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2022-05-14 11:35:49 +08:00
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__attribute__((weak)) void mcu_reset(void) {
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NVIC_SystemReset();
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}
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2021-12-27 18:10:07 +08:00
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// not needed at all, but if anybody attempts to invoke it....
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2021-12-27 18:20:52 +08:00
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void enter_bootloader_mode_if_requested(void) {}
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2021-12-27 18:10:07 +08:00
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#else
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/* This code should be checked whether it runs correctly on platforms */
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2021-12-27 18:20:52 +08:00
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# define SYMVAL(sym) (uint32_t)(((uint8_t *)&(sym)) - ((uint8_t *)0))
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# define BOOTLOADER_MAGIC 0xDEADBEEF
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2023-06-28 11:07:14 +08:00
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# define MAGIC_ADDR (unsigned long *)(SYMVAL(STM32_BOOTLOADER_RAM_SYMBOL) - 4)
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__attribute__((weak)) void bootloader_marker_enable(void) {
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uint32_t *marker = (uint32_t *)MAGIC_ADDR;
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*marker = BOOTLOADER_MAGIC; // set magic flag => reset handler will jump into boot loader
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}
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__attribute__((weak)) bool bootloader_marker_active(void) {
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const uint32_t *marker = (const uint32_t *)MAGIC_ADDR;
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return (*marker == BOOTLOADER_MAGIC) ? true : false;
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}
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__attribute__((weak)) void bootloader_marker_disable(void) {
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uint32_t *marker = (uint32_t *)MAGIC_ADDR;
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*marker = 0;
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}
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2021-12-27 18:10:07 +08:00
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2021-12-27 18:20:52 +08:00
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__attribute__((weak)) void bootloader_jump(void) {
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2023-06-28 11:07:14 +08:00
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bootloader_marker_enable();
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2021-12-27 18:10:07 +08:00
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NVIC_SystemReset();
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}
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2022-05-14 11:35:49 +08:00
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__attribute__((weak)) void mcu_reset(void) {
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NVIC_SystemReset();
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}
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2021-12-27 18:10:07 +08:00
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void enter_bootloader_mode_if_requested(void) {
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2023-06-28 11:07:14 +08:00
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if (bootloader_marker_active()) {
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bootloader_marker_disable();
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2023-07-04 19:16:14 +08:00
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struct system_memory_vector_t {
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uint32_t stack_top;
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void (*entrypoint)(void);
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};
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const struct system_memory_vector_t *bootloader = (const struct system_memory_vector_t *)(STM32_BOOTLOADER_ADDRESS);
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2023-06-28 11:07:14 +08:00
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__disable_irq();
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# if defined(QMK_MCU_ARCH_CORTEX_M7)
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SCB_DisableDCache();
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SCB_DisableICache();
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# endif
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# if defined(__MPU_PRESENT) && (__MPU_PRESENT == 1U)
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ARM_MPU_Disable();
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# endif
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SysTick->CTRL = 0;
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SysTick->VAL = 0;
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SysTick->LOAD = 0;
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// Clear interrupt enable and interrupt pending registers
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for (int i = 0; i < ARRAY_SIZE(NVIC->ICER); i++) {
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NVIC->ICER[i] = 0xFFFFFFFF;
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NVIC->ICPR[i] = 0xFFFFFFFF;
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}
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2023-07-04 19:16:14 +08:00
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__set_CONTROL(0);
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__set_MSP(bootloader->stack_top);
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2021-12-27 18:10:07 +08:00
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__enable_irq();
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2023-06-28 11:07:14 +08:00
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// Jump to bootloader
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bootloader->entrypoint();
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while (true) {
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}
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2021-12-27 18:10:07 +08:00
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}
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}
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#endif
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