mirror of
https://github.com/firewalkwithm3/qmk_firmware.git
synced 2024-11-22 11:30:30 +08:00
339 lines
9.3 KiB
C
339 lines
9.3 KiB
C
/* Copyright 2020 Nick Brassel (tzarc)
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <https://www.gnu.org/licenses/>.
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*/
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#include "spi_master.h"
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#include "timer.h"
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static bool spiStarted = false;
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#if SPI_SELECT_MODE == SPI_SELECT_MODE_NONE
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static pin_t currentSlavePin;
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#endif
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static SPIConfig spiConfig;
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__attribute__((weak)) void spi_init(void) {
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static bool is_initialised = false;
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if (!is_initialised) {
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is_initialised = true;
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// Try releasing special pins for a short time
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gpio_set_pin_input(SPI_SCK_PIN);
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if (SPI_MOSI_PIN != NO_PIN) {
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gpio_set_pin_input(SPI_MOSI_PIN);
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}
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if (SPI_MISO_PIN != NO_PIN) {
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gpio_set_pin_input(SPI_MISO_PIN);
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}
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chThdSleepMilliseconds(10);
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#if defined(USE_GPIOV1)
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palSetPadMode(PAL_PORT(SPI_SCK_PIN), PAL_PAD(SPI_SCK_PIN), SPI_SCK_PAL_MODE);
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if (SPI_MOSI_PIN != NO_PIN) {
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palSetPadMode(PAL_PORT(SPI_MOSI_PIN), PAL_PAD(SPI_MOSI_PIN), SPI_MOSI_PAL_MODE);
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}
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if (SPI_MISO_PIN != NO_PIN) {
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palSetPadMode(PAL_PORT(SPI_MISO_PIN), PAL_PAD(SPI_MISO_PIN), SPI_MISO_PAL_MODE);
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}
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#else
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palSetPadMode(PAL_PORT(SPI_SCK_PIN), PAL_PAD(SPI_SCK_PIN), SPI_SCK_FLAGS);
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if (SPI_MOSI_PIN != NO_PIN) {
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palSetPadMode(PAL_PORT(SPI_MOSI_PIN), PAL_PAD(SPI_MOSI_PIN), SPI_MOSI_FLAGS);
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}
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if (SPI_MISO_PIN != NO_PIN) {
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palSetPadMode(PAL_PORT(SPI_MISO_PIN), PAL_PAD(SPI_MISO_PIN), SPI_MISO_FLAGS);
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}
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#endif
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spiStop(&SPI_DRIVER);
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spiStarted = false;
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}
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}
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bool spi_start(pin_t slavePin, bool lsbFirst, uint8_t mode, uint16_t divisor) {
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#if (SPI_USE_MUTUAL_EXCLUSION == TRUE)
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spiAcquireBus(&SPI_DRIVER);
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#endif // (SPI_USE_MUTUAL_EXCLUSION == TRUE)
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if (spiStarted) {
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return false;
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}
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#if SPI_SELECT_MODE != SPI_SELECT_MODE_NONE
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if (slavePin == NO_PIN) {
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return false;
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}
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#endif
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#if !(defined(WB32F3G71xx) || defined(WB32FQ95xx))
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uint16_t roundedDivisor = 2;
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while (roundedDivisor < divisor) {
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roundedDivisor <<= 1;
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}
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if (roundedDivisor < 2 || roundedDivisor > 256) {
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return false;
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}
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#endif
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#if defined(K20x) || defined(KL2x)
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spiConfig.tar0 = SPIx_CTARn_FMSZ(7) | SPIx_CTARn_ASC(1);
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if (lsbFirst) {
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spiConfig.tar0 |= SPIx_CTARn_LSBFE;
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}
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switch (mode) {
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case 0:
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break;
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case 1:
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spiConfig.tar0 |= SPIx_CTARn_CPHA;
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break;
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case 2:
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spiConfig.tar0 |= SPIx_CTARn_CPOL;
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break;
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case 3:
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spiConfig.tar0 |= SPIx_CTARn_CPHA | SPIx_CTARn_CPOL;
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break;
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}
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switch (roundedDivisor) {
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case 2:
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spiConfig.tar0 |= SPIx_CTARn_BR(0);
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break;
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case 4:
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spiConfig.tar0 |= SPIx_CTARn_BR(1);
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break;
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case 8:
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spiConfig.tar0 |= SPIx_CTARn_BR(3);
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break;
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case 16:
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spiConfig.tar0 |= SPIx_CTARn_BR(4);
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break;
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case 32:
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spiConfig.tar0 |= SPIx_CTARn_BR(5);
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break;
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case 64:
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spiConfig.tar0 |= SPIx_CTARn_BR(6);
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break;
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case 128:
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spiConfig.tar0 |= SPIx_CTARn_BR(7);
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break;
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case 256:
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spiConfig.tar0 |= SPIx_CTARn_BR(8);
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break;
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}
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#elif defined(HT32)
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spiConfig.cr0 = SPI_CR0_SELOEN;
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spiConfig.cr1 = SPI_CR1_MODE | 8; // 8 bits and in master mode
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if (lsbFirst) {
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spiConfig.cr1 |= SPI_CR1_FIRSTBIT;
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}
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switch (mode) {
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case 0:
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spiConfig.cr1 |= SPI_CR1_FORMAT_MODE0;
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break;
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case 1:
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spiConfig.cr1 |= SPI_CR1_FORMAT_MODE1;
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break;
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case 2:
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spiConfig.cr1 |= SPI_CR1_FORMAT_MODE2;
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break;
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case 3:
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spiConfig.cr1 |= SPI_CR1_FORMAT_MODE3;
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break;
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}
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spiConfig.cpr = (roundedDivisor - 1) >> 1;
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#elif defined(WB32F3G71xx) || defined(WB32FQ95xx)
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if (!lsbFirst) {
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osalDbgAssert(lsbFirst != FALSE, "unsupported lsbFirst");
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}
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if (divisor < 1) {
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return false;
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}
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spiConfig.SPI_BaudRatePrescaler = (divisor << 2);
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switch (mode) {
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case 0:
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spiConfig.SPI_CPHA = SPI_CPHA_1Edge;
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spiConfig.SPI_CPOL = SPI_CPOL_Low;
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break;
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case 1:
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spiConfig.SPI_CPHA = SPI_CPHA_2Edge;
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spiConfig.SPI_CPOL = SPI_CPOL_Low;
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break;
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case 2:
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spiConfig.SPI_CPHA = SPI_CPHA_1Edge;
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spiConfig.SPI_CPOL = SPI_CPOL_High;
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break;
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case 3:
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spiConfig.SPI_CPHA = SPI_CPHA_2Edge;
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spiConfig.SPI_CPOL = SPI_CPOL_High;
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break;
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}
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#elif defined(MCU_RP)
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if (lsbFirst) {
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osalDbgAssert(lsbFirst == false, "RP2040s PrimeCell SPI implementation does not support sending LSB first.");
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}
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// Motorola frame format and 8bit transfer data size.
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spiConfig.SSPCR0 = SPI_SSPCR0_FRF_MOTOROLA | SPI_SSPCR0_DSS_8BIT;
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// Serial output clock = (ck_sys or ck_peri) / (SSPCPSR->CPSDVSR * (1 +
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// SSPCR0->SCR)). SCR is always set to zero, as QMK SPI API expects the
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// passed divisor to be the only value to divide the input clock by.
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spiConfig.SSPCPSR = roundedDivisor; // Even number from 2 to 254
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switch (mode) {
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case 0:
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spiConfig.SSPCR0 &= ~SPI_SSPCR0_SPO; // Clock polarity: low
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spiConfig.SSPCR0 &= ~SPI_SSPCR0_SPH; // Clock phase: sample on first edge
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break;
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case 1:
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spiConfig.SSPCR0 &= ~SPI_SSPCR0_SPO; // Clock polarity: low
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spiConfig.SSPCR0 |= SPI_SSPCR0_SPH; // Clock phase: sample on second edge transition
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break;
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case 2:
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spiConfig.SSPCR0 |= SPI_SSPCR0_SPO; // Clock polarity: high
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spiConfig.SSPCR0 &= ~SPI_SSPCR0_SPH; // Clock phase: sample on first edge
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break;
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case 3:
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spiConfig.SSPCR0 |= SPI_SSPCR0_SPO; // Clock polarity: high
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spiConfig.SSPCR0 |= SPI_SSPCR0_SPH; // Clock phase: sample on second edge transition
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break;
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}
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#else
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spiConfig.cr1 = 0;
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if (lsbFirst) {
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spiConfig.cr1 |= SPI_CR1_LSBFIRST;
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}
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switch (mode) {
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case 0:
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break;
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case 1:
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spiConfig.cr1 |= SPI_CR1_CPHA;
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break;
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case 2:
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spiConfig.cr1 |= SPI_CR1_CPOL;
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break;
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case 3:
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spiConfig.cr1 |= SPI_CR1_CPHA | SPI_CR1_CPOL;
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break;
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}
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switch (roundedDivisor) {
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case 2:
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break;
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case 4:
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spiConfig.cr1 |= SPI_CR1_BR_0;
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break;
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case 8:
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spiConfig.cr1 |= SPI_CR1_BR_1;
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break;
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case 16:
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spiConfig.cr1 |= SPI_CR1_BR_1 | SPI_CR1_BR_0;
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break;
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case 32:
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spiConfig.cr1 |= SPI_CR1_BR_2;
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break;
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case 64:
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spiConfig.cr1 |= SPI_CR1_BR_2 | SPI_CR1_BR_0;
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break;
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case 128:
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spiConfig.cr1 |= SPI_CR1_BR_2 | SPI_CR1_BR_1;
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break;
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case 256:
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spiConfig.cr1 |= SPI_CR1_BR_2 | SPI_CR1_BR_1 | SPI_CR1_BR_0;
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break;
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}
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#endif
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spiStarted = true;
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#if SPI_SELECT_MODE == SPI_SELECT_MODE_NONE
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currentSlavePin = slavePin;
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#endif
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#if SPI_SELECT_MODE == SPI_SELECT_MODE_PAD
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spiConfig.ssport = PAL_PORT(slavePin);
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spiConfig.sspad = PAL_PAD(slavePin);
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gpio_set_pin_output(slavePin);
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#elif SPI_SELECT_MODE == SPI_SELECT_MODE_NONE
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if (slavePin != NO_PIN) {
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gpio_set_pin_output(slavePin);
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}
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#else
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# error "Unsupported SPI_SELECT_MODE"
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#endif
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spiStart(&SPI_DRIVER, &spiConfig);
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spiSelect(&SPI_DRIVER);
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#if SPI_SELECT_MODE == SPI_SELECT_MODE_NONE
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if (slavePin != NO_PIN) {
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gpio_write_pin_low(slavePin);
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}
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#endif
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return true;
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}
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spi_status_t spi_write(uint8_t data) {
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uint8_t rxData;
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spiExchange(&SPI_DRIVER, 1, &data, &rxData);
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return rxData;
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}
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spi_status_t spi_read(void) {
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uint8_t data = 0;
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spiReceive(&SPI_DRIVER, 1, &data);
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return data;
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}
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spi_status_t spi_transmit(const uint8_t *data, uint16_t length) {
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spiSend(&SPI_DRIVER, length, data);
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return SPI_STATUS_SUCCESS;
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}
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spi_status_t spi_receive(uint8_t *data, uint16_t length) {
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spiReceive(&SPI_DRIVER, length, data);
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return SPI_STATUS_SUCCESS;
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}
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void spi_stop(void) {
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if (spiStarted) {
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#if SPI_SELECT_MODE == SPI_SELECT_MODE_NONE
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if (currentSlavePin != NO_PIN) {
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gpio_write_pin_high(currentSlavePin);
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}
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#endif
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spiUnselect(&SPI_DRIVER);
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spiStop(&SPI_DRIVER);
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spiStarted = false;
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}
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#if (SPI_USE_MUTUAL_EXCLUSION == TRUE)
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spiReleaseBus(&SPI_DRIVER);
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#endif // (SPI_USE_MUTUAL_EXCLUSION == TRUE)
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}
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