mirror of
https://github.com/firewalkwithm3/Sensor-Watch.git
synced 2024-11-22 11:10:29 +08:00
getting the sensor watch dev board working
This commit is contained in:
parent
6210e1c233
commit
52c5747d2e
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@ -19,14 +19,14 @@
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// LEDs
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// LEDs
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#define WATCH_INVERT_LED_POLARITY
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#define WATCH_INVERT_LED_POLARITY
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#define RED GPIO(GPIO_PORTB, 22)
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#define RED GPIO(GPIO_PORTA, 4)
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#define WATCH_RED_TCC_PINMUX PINMUX_PB22F_TCC0_WO2
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#define WATCH_RED_TCC_CHANNEL 0
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#define WATCH_RED_TCC_CHANNEL 2
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#define WATCH_RED_TCC_PINMUX PINMUX_PA04E_TCC0_WO0
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#ifdef WATCH_SWAP_LED_PINS
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#ifdef WATCH_SWAP_LED_PINS
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#define GREEN GPIO(GPIO_PORTA, 4)
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#define GREEN GPIO(GPIO_PORTB, 22)
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#define WATCH_GREEN_TCC_CHANNEL 0
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#define WATCH_GREEN_TCC_CHANNEL 2
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#define WATCH_GREEN_TCC_PINMUX PINMUX_PA04E_TCC0_WO0
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#define WATCH_GREEN_TCC_PINMUX PINMUX_PB22F_TCC0_WO2
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#else
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#else
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#define GREEN GPIO(GPIO_PORTB, 23)
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#define GREEN GPIO(GPIO_PORTB, 23)
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#define WATCH_GREEN_TCC_CHANNEL 3
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#define WATCH_GREEN_TCC_CHANNEL 3
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4
make.mk
4
make.mk
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@ -116,3 +116,7 @@ DEFINES += \
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ifeq ($(LED), BLUE)
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ifeq ($(LED), BLUE)
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CFLAGS += -DWATCH_SWAP_LED_PINS
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CFLAGS += -DWATCH_SWAP_LED_PINS
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endif
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endif
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ifeq ($(BOARD), OSO-FEAL-A1-00)
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CFLAGS += -DCRYSTALLESS
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endif
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@ -271,7 +271,7 @@
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// <i> Indicates whether the external interrupt 5 filter is enabled or not
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// <i> Indicates whether the external interrupt 5 filter is enabled or not
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// <id> eic_arch_filten5
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// <id> eic_arch_filten5
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#ifndef CONF_EIC_FILTEN5
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#ifndef CONF_EIC_FILTEN5
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#define CONF_EIC_FILTEN5 0
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#define CONF_EIC_FILTEN5 1
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#endif
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#endif
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// <q> External Interrupt 5 Event Output Enable
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// <q> External Interrupt 5 Event Output Enable
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@ -723,7 +723,12 @@
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// </e>
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// </e>
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// my god this is a hack. need to refactor this out of ASF and into our driver. - joey 10/19
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#ifdef CRYSTALLESS
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#define CONFIG_EIC_EXTINT_MAP {2, PIN_PA02}, {5, PIN_PB05}, {7, PIN_PA07},
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#else
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#define CONFIG_EIC_EXTINT_MAP {2, PIN_PA02}, {6, PIN_PA22}, {7, PIN_PA23},
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#define CONFIG_EIC_EXTINT_MAP {2, PIN_PA02}, {6, PIN_PA22}, {7, PIN_PA23},
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#endif
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// <<< end of configuration section >>>
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// <<< end of configuration section >>>
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@ -248,9 +248,14 @@
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// <i> This defines the clock source for generic clock generator 3
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// <i> This defines the clock source for generic clock generator 3
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// <id> gclk_gen_3_oscillator
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// <id> gclk_gen_3_oscillator
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#ifndef CONF_GCLK_GEN_3_SOURCE
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#ifndef CONF_GCLK_GEN_3_SOURCE
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#ifdef CRYSTALLESS
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#define CONF_GCLK_GEN_3_SOURCE GCLK_GENCTRL_SRC_OSCULP32K
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#else
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#define CONF_GCLK_GEN_3_SOURCE GCLK_GENCTRL_SRC_XOSC32K
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#define CONF_GCLK_GEN_3_SOURCE GCLK_GENCTRL_SRC_XOSC32K
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#endif
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#endif
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#endif
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// <q> Run in Standby
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// <q> Run in Standby
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// <i> Indicates whether Run in Standby is enabled or not
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// <i> Indicates whether Run in Standby is enabled or not
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// <id> gclk_arch_gen_3_runstdby
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// <id> gclk_arch_gen_3_runstdby
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@ -17,8 +17,12 @@
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// <i> This defines the clock source for RTC
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// <i> This defines the clock source for RTC
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// <id> rtc_source_oscillator
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// <id> rtc_source_oscillator
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#ifndef CONF_RTCCTRL_SRC
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#ifndef CONF_RTCCTRL_SRC
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#ifdef CRYSTALLESS
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#define CONF_RTCCTRL_SRC GCLK_GENCTRL_SRC_OSCULP32K
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#else
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#define CONF_RTCCTRL_SRC GCLK_GENCTRL_SRC_XOSC32K
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#define CONF_RTCCTRL_SRC GCLK_GENCTRL_SRC_XOSC32K
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#endif
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#endif
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#endif
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// <q> Use 1 kHz output
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// <q> Use 1 kHz output
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// <id> rtc_1khz_selection
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// <id> rtc_1khz_selection
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@ -65,18 +65,14 @@ void watch_register_interrupt_callback(const uint8_t pin, ext_irq_cb_t callback,
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sense_pos = 4 * (WATCH_A4_EIC_CHANNEL % 8);
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sense_pos = 4 * (WATCH_A4_EIC_CHANNEL % 8);
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break;
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break;
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case BTN_ALARM:
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case BTN_ALARM:
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// for the buttons, we need an internal pull-down.
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gpio_set_pin_pull_mode(pin, GPIO_PULL_DOWN);
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config_index = (WATCH_BTN_ALARM_EIC_CHANNEL > 7) ? 1 : 0;
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config_index = (WATCH_BTN_ALARM_EIC_CHANNEL > 7) ? 1 : 0;
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sense_pos = 4 * (WATCH_BTN_ALARM_EIC_CHANNEL % 8);
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sense_pos = 4 * (WATCH_BTN_ALARM_EIC_CHANNEL % 8);
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break;
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break;
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case BTN_LIGHT:
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case BTN_LIGHT:
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gpio_set_pin_pull_mode(pin, GPIO_PULL_DOWN);
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config_index = (WATCH_BTN_LIGHT_EIC_CHANNEL > 7) ? 1 : 0;
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config_index = (WATCH_BTN_LIGHT_EIC_CHANNEL > 7) ? 1 : 0;
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sense_pos = 4 * (WATCH_BTN_LIGHT_EIC_CHANNEL % 8);
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sense_pos = 4 * (WATCH_BTN_LIGHT_EIC_CHANNEL % 8);
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break;
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break;
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case BTN_MODE:
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case BTN_MODE:
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gpio_set_pin_pull_mode(pin, GPIO_PULL_DOWN);
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config_index = (WATCH_BTN_MODE_EIC_CHANNEL > 7) ? 1 : 0;
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config_index = (WATCH_BTN_MODE_EIC_CHANNEL > 7) ? 1 : 0;
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sense_pos = 4 * (WATCH_BTN_MODE_EIC_CHANNEL % 8);
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sense_pos = 4 * (WATCH_BTN_MODE_EIC_CHANNEL % 8);
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break;
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break;
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@ -85,7 +81,6 @@ void watch_register_interrupt_callback(const uint8_t pin, ext_irq_cb_t callback,
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}
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}
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gpio_set_pin_direction(pin, GPIO_DIRECTION_IN);
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gpio_set_pin_direction(pin, GPIO_DIRECTION_IN);
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gpio_set_pin_function(pin, GPIO_PIN_FUNCTION_A);
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// EIC configuration register is enable-protected, so we have to disable it first...
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// EIC configuration register is enable-protected, so we have to disable it first...
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if (hri_eic_get_CTRLA_reg(EIC, EIC_CTRLA_ENABLE)) {
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if (hri_eic_get_CTRLA_reg(EIC, EIC_CTRLA_ENABLE)) {
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@ -98,6 +93,9 @@ void watch_register_interrupt_callback(const uint8_t pin, ext_irq_cb_t callback,
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config &= ~(7 << sense_pos);
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config &= ~(7 << sense_pos);
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config |= trigger << (sense_pos);
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config |= trigger << (sense_pos);
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hri_eic_write_CONFIG_reg(EIC, config_index, config);
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hri_eic_write_CONFIG_reg(EIC, config_index, config);
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// ...set the pin mode...
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gpio_set_pin_function(pin, GPIO_PIN_FUNCTION_A);
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if (pin == BTN_ALARM || pin == BTN_LIGHT || pin == BTN_MODE) gpio_set_pin_pull_mode(pin, GPIO_PULL_DOWN);
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// ...and re-enable the EIC
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// ...and re-enable the EIC
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hri_eic_set_CTRLA_ENABLE_bit(EIC);
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hri_eic_set_CTRLA_ENABLE_bit(EIC);
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