remove timer; tick based on RTC PER7 interrupt

This commit is contained in:
Joey Castillo 2021-05-02 15:45:40 -04:00
parent 9b381ef6ae
commit 88a38cc235
17 changed files with 18 additions and 979 deletions

View file

@ -48,7 +48,6 @@
<file category="doc" condition="ARMCC, GCC, IAR" name="hal/documentation/i2c_master_sync.rst"/>
<file category="doc" condition="ARMCC, GCC, IAR" name="hal/documentation/pwm.rst"/>
<file category="doc" condition="ARMCC, GCC, IAR" name="hal/documentation/slcd_sync.rst"/>
<file category="doc" condition="ARMCC, GCC, IAR" name="hal/documentation/timer.rst"/>
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hal_atomic.h"/>
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hal_calendar.h"/>
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hal_delay.h"/>
@ -144,7 +143,6 @@
<file category="source" condition="ARMCC, GCC, IAR" name="examples/driver_examples.c"/>
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hal_adc_sync.h"/>
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hal_pwm.h"/>
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hal_timer.h"/>
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_adc_async.h"/>
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_adc_sync.h"/>
<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_calendar.h"/>
@ -163,7 +161,6 @@
<file category="source" condition="ARMCC, GCC, IAR" name="hal/src/hal_calendar.c"/>
<file category="source" condition="ARMCC, GCC, IAR" name="hal/src/hal_ext_irq.c"/>
<file category="source" condition="ARMCC, GCC, IAR" name="hal/src/hal_pwm.c"/>
<file category="source" condition="ARMCC, GCC, IAR" name="hal/src/hal_timer.c"/>
<file category="header" condition="ARMCC, GCC, IAR" name="hal/utils/include/parts.h"/>
<file category="source" condition="ARMCC, GCC, IAR" name="hpl/adc/hpl_adc.c"/>
<file category="header" condition="ARMCC, GCC, IAR" name="hpl/adc/hpl_adc_base.h"/>

View file

@ -859,37 +859,6 @@ drivers:
variant: null
clocks:
domain_group: null
TIMER_0:
user_label: TIMER_0
definition: Atmel:SAML22_Drivers:0.0.1::SAML22J18A-AN::TC0::driver_config_definition::Timer::HAL:Driver:Timer
functionality: Timer
api: HAL:Driver:Timer
configuration:
tc_arch_dbgrun: false
tc_arch_evact: Event action disabled
tc_arch_mceo0: false
tc_arch_mceo1: false
tc_arch_ondemand: false
tc_arch_ovfeo: false
tc_arch_presync: Reload or reset counter on next GCLK
tc_arch_runstdby: true
tc_arch_tcei: false
tc_arch_tcinv: false
timer_advanced_configuration: true
timer_event_control: false
timer_prescaler: Divide by 2
timer_tick: 61
optional_signals: []
variant: null
clocks:
domain_group:
nodes:
- name: TC
input: Generic clock generator 3
external: false
external_frequency: 0
configuration:
tc_gclk_selection: Generic clock generator 3
PWM_0:
user_label: PWM_0
definition: Atmel:SAML22_Drivers:0.0.1::SAML22J18A-AN::TC3::driver_config_definition::PWM::HAL:Driver:PWM

View file

@ -4,177 +4,6 @@
// <<< Use Configuration Wizard in Context Menu >>>
#ifndef CONF_TC0_ENABLE
#define CONF_TC0_ENABLE 1
#endif
#include "peripheral_clk_config.h"
// <h> Basic configuration
// <o> Prescaler
// <0x0=> No division
// <0x1=> Divide by 2
// <0x2=> Divide by 4
// <0x3=> Divide by 8
// <0x4=> Divide by 16
// <0x5=> Divide by 64
// <0x6=> Divide by 256
// <0x7=> Divide by 1024
// <i> This defines the prescaler value
// <id> timer_prescaler
#ifndef CONF_TC0_PRESCALER
#define CONF_TC0_PRESCALER 0x1
#endif
// <o> Length of one timer tick in uS <0-4294967295>
// <id> timer_tick
#ifndef CONF_TC0_TIMER_TICK
#define CONF_TC0_TIMER_TICK 61
#endif
// </h>
// <e> Advanced configuration
// <id> timer_advanced_configuration
#ifndef CONF_TC0__ADVANCED_CONFIGURATION_ENABLE
#define CONF_TC0__ADVANCED_CONFIGURATION_ENABLE 1
#endif
// <y> Prescaler and Counter Synchronization Selection
// <TC_CTRLA_PRESCSYNC_GCLK_Val"> Reload or reset counter on next GCLK
// <TC_CTRLA_PRESCSYNC_PRESC_Val"> Reload or reset counter on next prescaler clock
// <TC_CTRLA_PRESCSYNC_RESYNC_Val"> Reload or reset counter on next GCLK and reset prescaler counter
// <i> These bits select if on retrigger event, the Counter should be cleared or reloaded on the next GCLK_TCx clock or on the next prescaled GCLK_TCx clock.
// <id> tc_arch_presync
#ifndef CONF_TC0_PRESCSYNC
#define CONF_TC0_PRESCSYNC TC_CTRLA_PRESCSYNC_GCLK_Val
#endif
// <q> Run in standby
// <i> Indicates whether the module will continue to run in standby sleep mode
// <id> tc_arch_runstdby
#ifndef CONF_TC0_RUNSTDBY
#define CONF_TC0_RUNSTDBY 1
#endif
// <q> Run in debug mode
// <i> Indicates whether the module will run in debug mode
// <id> tc_arch_dbgrun
#ifndef CONF_TC0_DBGRUN
#define CONF_TC0_DBGRUN 0
#endif
// <q> Run on demand
// <i> Run if requested by some other peripheral in the device
// <id> tc_arch_ondemand
#ifndef CONF_TC0_ONDEMAND
#define CONF_TC0_ONDEMAND 0
#endif
// </e>
// <e> Event control
// <id> timer_event_control
#ifndef CONF_TC0_EVENT_CONTROL_ENABLE
#define CONF_TC0_EVENT_CONTROL_ENABLE 0
#endif
// <q> Output Event On Match or Capture on Channel 0
// <i> Enable output of event on timer tick
// <id> tc_arch_mceo0
#ifndef CONF_TC0_MCEO0
#define CONF_TC0_MCEO0 0
#endif
// <q> Output Event On Match or Capture on Channel 1
// <i> Enable output of event on timer tick
// <id> tc_arch_mceo1
#ifndef CONF_TC0_MCEO1
#define CONF_TC0_MCEO1 0
#endif
// <q> Output Event On Timer Tick
// <i> Enable output of event on timer tick
// <id> tc_arch_ovfeo
#ifndef CONF_TC0_OVFEO
#define CONF_TC0_OVFEO 0
#endif
// <q> Event Input
// <i> Enable asynchronous input events
// <id> tc_arch_tcei
#ifndef CONF_TC0_TCEI
#define CONF_TC0_TCEI 0
#endif
// <q> Inverted Event Input
// <i> Invert the asynchronous input events
// <id> tc_arch_tcinv
#ifndef CONF_TC0_TCINV
#define CONF_TC0_TCINV 0
#endif
// <o> Event action
// <0=> Event action disabled
// <1=> Start, restart or re-trigger TC on event
// <2=> Count on event
// <3=> Start on event
// <4=> Time stamp capture
// <5=> Period captured in CC0, pulse width in CC1
// <6=> Period captured in CC1, pulse width in CC0
// <7=> Pulse width capture
// <i> Event which will be performed on an event
//<id> tc_arch_evact
#ifndef CONF_TC0_EVACT
#define CONF_TC0_EVACT 0
#endif
// </e>
// Default values which the driver needs in order to work correctly
// Mode set to 32-bit
#ifndef CONF_TC0_MODE
#define CONF_TC0_MODE TC_CTRLA_MODE_COUNT32_Val
#endif
// CC 1 register set to 0
#ifndef CONF_TC0_CC1
#define CONF_TC0_CC1 0
#endif
#ifndef CONF_TC0_ALOCK
#define CONF_TC0_ALOCK 0
#endif
// Not used in 32-bit mode
#define CONF_TC0_PER 0
// Calculating correct top value based on requested tick interval.
#define CONF_TC0_PRESCALE (1 << CONF_TC0_PRESCALER)
// Prescaler set to 64
#if CONF_TC0_PRESCALER > 0x4
#undef CONF_TC0_PRESCALE
#define CONF_TC0_PRESCALE 64
#endif
// Prescaler set to 256
#if CONF_TC0_PRESCALER > 0x5
#undef CONF_TC0_PRESCALE
#define CONF_TC0_PRESCALE 256
#endif
// Prescaler set to 1024
#if CONF_TC0_PRESCALER > 0x6
#undef CONF_TC0_PRESCALE
#define CONF_TC0_PRESCALE 1024
#endif
#ifndef CONF_TC0_CC0
#define CONF_TC0_CC0 \
(uint32_t)(((float)CONF_TC0_TIMER_TICK / 1000000.f) / (1.f / (CONF_GCLK_TC0_FREQUENCY / CONF_TC0_PRESCALE)))
#endif
#include <peripheral_clk_config.h>
#ifndef CONF_TC3_ENABLE

View file

@ -145,32 +145,6 @@
// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4
// <i> Select the clock source for TC.
#ifndef CONF_GCLK_TC0_SRC
#define CONF_GCLK_TC0_SRC GCLK_PCHCTRL_GEN_GCLK3_Val
#endif
/**
* \def CONF_GCLK_TC0_FREQUENCY
* \brief TC0's Clock frequency
*/
#ifndef CONF_GCLK_TC0_FREQUENCY
#define CONF_GCLK_TC0_FREQUENCY 32768
#endif
// <y> TC Clock Source
// <id> tc_gclk_selection
// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0
// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1
// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2
// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3
// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4
// <i> Select the clock source for TC.
#ifndef CONF_GCLK_TC3_SRC
#define CONF_GCLK_TC3_SRC GCLK_PCHCTRL_GEN_GCLK0_Val

View file

@ -142,11 +142,10 @@
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@ -165,7 +164,6 @@
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@ -188,7 +186,7 @@
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@ -206,9 +204,9 @@
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@ -602,9 +600,6 @@
<Compile Include="hal\include\hal_sleep.h">
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<Compile Include="hal\include\hpl_adc_async.h">
<SubType>compile</SubType>
</Compile>
@ -743,9 +738,6 @@
<Compile Include="hal\src\hal_sleep.c">
<SubType>compile</SubType>
</Compile>
<Compile Include="hal\src\hal_timer.c">
<SubType>compile</SubType>
</Compile>
<Compile Include="hal\utils\include\compiler.h">
<SubType>compile</SubType>
</Compile>
@ -1043,9 +1035,6 @@
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<Import Project="$(AVRSTUDIO_EXE_PATH)\\Vs\\Compiler.targets" />
</Project>

View file

@ -13,7 +13,6 @@
#include <hpl_adc_base.h>
struct timer_descriptor TIMER_0;
struct slcd_sync_descriptor SEGMENT_LCD_0;
struct adc_sync_descriptor ADC_0;
@ -159,19 +158,6 @@ void delay_driver_init(void)
delay_init(SysTick);
}
/**
* \brief Timer initialization function
*
* Enables Timer peripheral, clocks and initializes Timer driver
*/
void TIMER_0_init(void)
{
hri_mclk_set_APBCMASK_TC0_bit(MCLK);
hri_gclk_write_PCHCTRL_reg(GCLK, TC0_GCLK_ID, CONF_GCLK_TC0_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
timer_init(&TIMER_0, TC0, _tc_get_timer());
}
void PWM_0_PORT_init(void)
{

View file

@ -30,7 +30,6 @@ extern "C" {
#include <hal_i2c_m_sync.h>
#include <hal_delay.h>
#include <hal_timer.h>
#include <hpl_tc_base.h>
#include <hal_pwm.h>
#include <hpl_tc_base.h>
@ -45,8 +44,6 @@ extern struct calendar_descriptor CALENDAR_0;
extern struct i2c_m_sync_desc I2C_0;
extern struct timer_descriptor TIMER_0;
extern struct pwm_descriptor PWM_0;
extern struct pwm_descriptor PWM_1;
@ -65,8 +62,6 @@ void I2C_0_PORT_init(void);
void delay_driver_init(void);
void TIMER_0_init(void);
void PWM_0_PORT_init(void);
void PWM_0_CLOCK_init(void);
void PWM_0_init(void);

View file

@ -97,33 +97,6 @@ void delay_example(void)
delay_ms(5000);
}
static struct timer_task TIMER_0_task1, TIMER_0_task2;
/**
* Example of using TIMER_0.
*/
static void TIMER_0_task1_cb(const struct timer_task *const timer_task)
{
}
static void TIMER_0_task2_cb(const struct timer_task *const timer_task)
{
}
void TIMER_0_example(void)
{
TIMER_0_task1.interval = 100;
TIMER_0_task1.cb = TIMER_0_task1_cb;
TIMER_0_task1.mode = TIMER_TASK_REPEAT;
TIMER_0_task2.interval = 200;
TIMER_0_task2.cb = TIMER_0_task2_cb;
TIMER_0_task2.mode = TIMER_TASK_REPEAT;
timer_add_task(&TIMER_0, &TIMER_0_task1);
timer_add_task(&TIMER_0, &TIMER_0_task2);
timer_start(&TIMER_0);
}
/**
* Example of using PWM_0.
*/

View file

@ -22,8 +22,6 @@ void I2C_0_example(void);
void delay_example(void);
void TIMER_0_example(void);
void PWM_0_example(void);
void PWM_1_example(void);

View file

@ -1,52 +0,0 @@
============================
The Timer driver (bare-bone)
============================
The Timer driver provides means for delayed and periodical function invocation.
A timer task is a piece of code (function) executed at a specific time or periodically by the timer after the task has
been added to the timers task queue. The execution delay or period is set in ticks, where one tick is defined as a
configurable number of clock cycles in the hardware timer. Changing the number of clock cycles in a tick automatically
changes execution delays and periods for all tasks in the timers task queue.
A task has two operation modes, single-shot or repeating mode. In single-shot mode the task is removed from the task queue
and then is executed once, in repeating mode the task reschedules itself automatically after it has executed based on
the period set in the task configuration.
In single-shot mode a task is removed from the task queue before its callback is invoked. It allows an application to
reuse the memory of expired task in the callback.
Each instance of the Timer driver supports infinite amount of timer tasks, only limited by the amount of RAM available.
Features
--------
* Initialization and de-initialization
* Starting and stopping
* Timer tasks - periodical invocation of functions
* Changing and obtaining of the period of a timer
Applications
------------
* Delayed and periodical function execution for middle-ware stacks and applications.
Dependencies
------------
* Each instance of the driver requires separate hardware timer capable of generating periodic interrupt.
Concurrency
-----------
The Timer driver is an interrupt driven driver.This means that the interrupt that triggers a task may occur during
the process of adding or removing a task via the driver's API. In such case the interrupt processing is postponed
until the task adding or removing is complete.
The task queue is not protected from the access by interrupts not used by the driver. Due to this
it is not recommended to add or remove a task from such interrupts: in case if a higher priority interrupt supersedes
the driver's interrupt, adding or removing a task may cause unpredictable behavior of the driver.
Limitations
-----------
* The driver is designed to work outside of an operating system environment, the task queue is therefore processed in interrupt context which may delay execution of other interrupts.
* If there are a lot of frequently called interrupts with the priority higher than the driver's one, it may cause delay for triggering of a task.
Knows issues and workarounds
----------------------------
Not applicable

View file

@ -1,206 +0,0 @@
/**
* \file
*
* \brief Timer task functionality declaration.
*
* Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
*
* \asf_license_start
*
* \page License
*
* Subject to your compliance with these terms, you may use Microchip
* software and any derivatives exclusively with Microchip products.
* It is your responsibility to comply with third party license terms applicable
* to your use of third party software (including open source software) that
* may accompany Microchip software.
*
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
*
* \asf_license_stop
*
*/
#ifndef _HAL_TIMER_H_INCLUDED
#define _HAL_TIMER_H_INCLUDED
#include <utils_list.h>
#include <hpl_timer.h>
#ifdef __cplusplus
extern "C" {
#endif
/**
* \addtogroup doc_driver_hal_timer
*
* @{
*/
/**
* \brief Timer mode type
*/
enum timer_task_mode { TIMER_TASK_ONE_SHOT, TIMER_TASK_REPEAT };
/**
* \brief Timer task descriptor
*
* The timer task descriptor forward declaration.
*/
struct timer_task;
/**
* \brief Timer task callback function type
*/
typedef void (*timer_cb_t)(const struct timer_task *const timer_task);
/**
* \brief Timer task structure
*/
struct timer_task {
struct list_element elem; /*! List element. */
uint32_t time_label; /*! Absolute timer start time. */
uint32_t interval; /*! Number of timer ticks before calling the task. */
timer_cb_t cb; /*! Function pointer to the task. */
enum timer_task_mode mode; /*! Task mode: one shot or repeat. */
};
/**
* \brief Timer structure
*/
struct timer_descriptor {
struct _timer_device device;
uint32_t time;
struct list_descriptor tasks; /*! Timer tasks list. */
volatile uint8_t flags;
};
/**
* \brief Initialize timer
*
* This function initializes the given timer.
* It checks if the given hardware is not initialized and if the given hardware
* is permitted to be initialized.
*
* \param[out] descr A timer descriptor to initialize
* \param[in] hw The pointer to the hardware instance
* \param[in] func The pointer to a set of function pointers
*
* \return Initialization status.
*/
int32_t timer_init(struct timer_descriptor *const descr, void *const hw, struct _timer_hpl_interface *const func);
/**
* \brief Deinitialize timer
*
* This function deinitializes the given timer.
* It checks if the given hardware is initialized and if the given hardware is
* permitted to be deinitialized.
*
* \param[in] descr A timer descriptor to deinitialize
*
* \return De-initialization status.
*/
int32_t timer_deinit(struct timer_descriptor *const descr);
/**
* \brief Start timer
*
* This function starts the given timer.
* It checks if the given hardware is initialized.
*
* \param[in] descr The timer descriptor of a timer to start
*
* \return Timer starting status.
*/
int32_t timer_start(struct timer_descriptor *const descr);
/**
* \brief Stop timer
*
* This function stops the given timer.
* It checks if the given hardware is initialized.
*
* \param[in] descr The timer descriptor of a timer to stop
*
* \return Timer stopping status.
*/
int32_t timer_stop(struct timer_descriptor *const descr);
/**
* \brief Set amount of clock cycles per timer tick
*
* This function sets the amount of clock cycles per timer tick for the given timer.
* It checks if the given hardware is initialized.
*
* \param[in] descr The timer descriptor of a timer to stop
* \param[in] clock_cycles The amount of clock cycles per tick to set
*
* \return Setting clock cycles amount status.
*/
int32_t timer_set_clock_cycles_per_tick(struct timer_descriptor *const descr, const uint32_t clock_cycles);
/**
* \brief Retrieve the amount of clock cycles in a tick
*
* This function retrieves how many clock cycles there are in a single timer tick.
* It checks if the given hardware is initialized.
*
* \param[in] descr The timer descriptor of a timer to convert ticks to
* clock cycles
* \param[out] cycles The amount of clock cycles
*
* \return The status of clock cycles retrieving.
*/
int32_t timer_get_clock_cycles_in_tick(const struct timer_descriptor *const descr, uint32_t *const cycles);
/**
* \brief Add timer task
*
* This function adds the given timer task to the given timer.
* It checks if the given hardware is initialized.
*
* \param[in] descr The timer descriptor of a timer to add task to
* \param[in] task A task to add
*
* \return Timer's task adding status.
*/
int32_t timer_add_task(struct timer_descriptor *const descr, struct timer_task *const task);
/**
* \brief Remove timer task
*
* This function removes the given timer task from the given timer.
* It checks if the given hardware is initialized.
*
* \param[in] descr The timer descriptor of a timer to remove task from
* \param[in] task A task to remove
*
* \return Timer's task removing status.
*/
int32_t timer_remove_task(struct timer_descriptor *const descr, const struct timer_task *const task);
/**
* \brief Retrieve the current driver version
*
* \return Current driver version.
*/
uint32_t timer_get_version(void);
/**@}*/
#ifdef __cplusplus
}
#endif
#endif /* _HAL_TIMER_H_INCLUDED */

View file

@ -1,250 +0,0 @@
/**
* \file
*
* \brief Timer functionality implementation.
*
* Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
*
* \asf_license_start
*
* \page License
*
* Subject to your compliance with these terms, you may use Microchip
* software and any derivatives exclusively with Microchip products.
* It is your responsibility to comply with third party license terms applicable
* to your use of third party software (including open source software) that
* may accompany Microchip software.
*
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
*
* \asf_license_stop
*
*/
#include "hal_timer.h"
#include <utils_assert.h>
#include <utils.h>
#include <hal_atomic.h>
#include <hpl_irq.h>
/**
* \brief Driver version
*/
#define DRIVER_VERSION 0x00000001u
/**
* \brief Timer flags
*/
#define TIMER_FLAG_QUEUE_IS_TAKEN 1
#define TIMER_FLAG_INTERRUPT_TRIGERRED 2
static void timer_add_timer_task(struct list_descriptor *list, struct timer_task *const new_task, const uint32_t time);
static void timer_process_counted(struct _timer_device *device);
/**
* \brief Initialize timer
*/
int32_t timer_init(struct timer_descriptor *const descr, void *const hw, struct _timer_hpl_interface *const func)
{
ASSERT(descr && hw);
_timer_init(&descr->device, hw);
descr->time = 0;
descr->device.timer_cb.period_expired = timer_process_counted;
return ERR_NONE;
}
/**
* \brief Deinitialize timer
*/
int32_t timer_deinit(struct timer_descriptor *const descr)
{
ASSERT(descr);
_timer_deinit(&descr->device);
return ERR_NONE;
}
/**
* \brief Start timer
*/
int32_t timer_start(struct timer_descriptor *const descr)
{
ASSERT(descr);
if (_timer_is_started(&descr->device)) {
return ERR_DENIED;
}
_timer_start(&descr->device);
return ERR_NONE;
}
/**
* \brief Stop timer
*/
int32_t timer_stop(struct timer_descriptor *const descr)
{
ASSERT(descr);
if (!_timer_is_started(&descr->device)) {
return ERR_DENIED;
}
_timer_stop(&descr->device);
return ERR_NONE;
}
/**
* \brief Set amount of clock cycler per timer tick
*/
int32_t timer_set_clock_cycles_per_tick(struct timer_descriptor *const descr, const uint32_t clock_cycles)
{
ASSERT(descr);
_timer_set_period(&descr->device, clock_cycles);
return ERR_NONE;
}
/**
* \brief Add timer task
*/
int32_t timer_add_task(struct timer_descriptor *const descr, struct timer_task *const task)
{
ASSERT(descr && task);
descr->flags |= TIMER_FLAG_QUEUE_IS_TAKEN;
if (is_list_element(&descr->tasks, task)) {
descr->flags &= ~TIMER_FLAG_QUEUE_IS_TAKEN;
ASSERT(false);
return ERR_ALREADY_INITIALIZED;
}
task->time_label = descr->time;
timer_add_timer_task(&descr->tasks, task, descr->time);
descr->flags &= ~TIMER_FLAG_QUEUE_IS_TAKEN;
if (descr->flags & TIMER_FLAG_INTERRUPT_TRIGERRED) {
CRITICAL_SECTION_ENTER()
descr->flags &= ~TIMER_FLAG_INTERRUPT_TRIGERRED;
_timer_set_irq(&descr->device);
CRITICAL_SECTION_LEAVE()
}
return ERR_NONE;
}
/**
* \brief Remove timer task
*/
int32_t timer_remove_task(struct timer_descriptor *const descr, const struct timer_task *const task)
{
ASSERT(descr && task);
descr->flags |= TIMER_FLAG_QUEUE_IS_TAKEN;
if (!is_list_element(&descr->tasks, task)) {
descr->flags &= ~TIMER_FLAG_QUEUE_IS_TAKEN;
ASSERT(false);
return ERR_NOT_FOUND;
}
list_delete_element(&descr->tasks, task);
descr->flags &= ~TIMER_FLAG_QUEUE_IS_TAKEN;
if (descr->flags & TIMER_FLAG_INTERRUPT_TRIGERRED) {
CRITICAL_SECTION_ENTER()
descr->flags &= ~TIMER_FLAG_INTERRUPT_TRIGERRED;
_timer_set_irq(&descr->device);
CRITICAL_SECTION_LEAVE()
}
return ERR_NONE;
}
/**
* \brief Retrieve the amount of clock cycles in a tick
*/
int32_t timer_get_clock_cycles_in_tick(const struct timer_descriptor *const descr, uint32_t *const cycles)
{
ASSERT(descr && cycles);
*cycles = _timer_get_period(&descr->device);
return ERR_NONE;
}
/**
* \brief Retrieve the current driver version
*/
uint32_t timer_get_version(void)
{
return DRIVER_VERSION;
}
/**
* \internal Insert a timer task into sorted timer's list
*
* \param[in] head The pointer to the head of timer task list
* \param[in] task The pointer to task to add
* \param[in] time Current timer time
*/
static void timer_add_timer_task(struct list_descriptor *list, struct timer_task *const new_task, const uint32_t time)
{
struct timer_task *it, *prev = NULL, *head = (struct timer_task *)list_get_head(list);
if (!head) {
list_insert_as_head(list, new_task);
return;
}
for (it = head; it; it = (struct timer_task *)list_get_next_element(it)) {
uint32_t time_left;
if (it->time_label <= time) {
time_left = it->interval - (time - it->time_label);
} else {
time_left = it->interval - (0xFFFFFFFF - it->time_label) - time;
}
if (time_left >= new_task->interval)
break;
prev = it;
}
if (it == head) {
list_insert_as_head(list, new_task);
} else {
list_insert_after(prev, new_task);
}
}
/**
* \internal Process interrupts
*/
static void timer_process_counted(struct _timer_device *device)
{
struct timer_descriptor *timer = CONTAINER_OF(device, struct timer_descriptor, device);
struct timer_task * it = (struct timer_task *)list_get_head(&timer->tasks);
uint32_t time = ++timer->time;
if ((timer->flags & TIMER_FLAG_QUEUE_IS_TAKEN) || (timer->flags & TIMER_FLAG_INTERRUPT_TRIGERRED)) {
timer->flags |= TIMER_FLAG_INTERRUPT_TRIGERRED;
return;
}
while (it && ((time - it->time_label) >= it->interval)) {
struct timer_task *tmp = it;
list_remove_head(&timer->tasks);
if (TIMER_TASK_REPEAT == tmp->mode) {
tmp->time_label = time;
timer_add_timer_task(&timer->tasks, tmp, time);
}
it = (struct timer_task *)list_get_head(&timer->tasks);
tmp->cb(tmp);
}
}

View file

@ -316,10 +316,10 @@ int32_t _tamper_register_callback(struct calendar_dev *const dev, tamper_drv_cb_
NVIC_EnableIRQ(RTC_IRQn);
/* enable tamper interrupt */
hri_rtcmode0_set_INTEN_TAMPER_bit(dev->hw);
hri_rtcmode0_set_INTEN_PER7_bit(dev->hw);
} else {
/* disable tamper interrupt */
hri_rtcmode0_clear_INTEN_TAMPER_bit(dev->hw);
hri_rtcmode0_clear_INTEN_PER7_bit(dev->hw);
/* disable RTC_IRQn */
NVIC_DisableIRQ(RTC_IRQn);
@ -372,11 +372,11 @@ static void _rtc_interrupt_handler(struct calendar_dev *dev)
/* Clear interrupt flag */
hri_rtcmode0_clear_interrupt_CMP0_bit(dev->hw);
} else if ((interrupt_status & interrupt_enabled) & RTC_MODE2_INTFLAG_TAMPER) {
} else if ((interrupt_status & interrupt_enabled) & RTC_MODE2_INTFLAG_PER7) {
dev->callback_tamper(dev);
/* Clear interrupt flag */
hri_rtcmode0_clear_interrupt_TAMPER_bit(dev->hw);
hri_rtcmode0_clear_interrupt_PER7_bit(dev->hw);
}
}
/**

View file

@ -139,59 +139,11 @@ static struct _pwm_hpl_interface _tc_pwm_functions = {
_tc_pwm_set_irq_state,
};
static struct _timer_device *_tc0_dev = NULL;
static struct _pwm_device *_tc3_dev = NULL;
static int8_t get_tc_index(const void *const hw);
static void _tc_init_irq_param(const void *const hw, void *dev);
static inline uint8_t _get_hardware_offset(const void *const hw);
/**
* \brief Initialize TC
*/
int32_t _timer_init(struct _timer_device *const device, void *const hw)
{
int8_t i = get_tc_index(hw);
device->hw = hw;
ASSERT(ARRAY_SIZE(_tcs));
if (!hri_tc_is_syncing(hw, TC_SYNCBUSY_SWRST)) {
if (hri_tc_get_CTRLA_reg(hw, TC_CTRLA_ENABLE)) {
hri_tc_clear_CTRLA_ENABLE_bit(hw);
hri_tc_wait_for_sync(hw, TC_SYNCBUSY_ENABLE);
}
hri_tc_write_CTRLA_reg(hw, TC_CTRLA_SWRST);
}
hri_tc_wait_for_sync(hw, TC_SYNCBUSY_SWRST);
hri_tc_write_CTRLA_reg(hw, _tcs[i].ctrl_a);
hri_tc_write_DBGCTRL_reg(hw, _tcs[i].dbg_ctrl);
hri_tc_write_EVCTRL_reg(hw, _tcs[i].event_ctrl);
hri_tc_write_WAVE_reg(hw, TC_WAVE_WAVEGEN_MFRQ);
if ((_tcs[i].ctrl_a & TC_CTRLA_MODE_Msk) == TC_CTRLA_MODE_COUNT32) {
hri_tccount32_write_CC_reg(hw, 0, _tcs[i].cc0);
hri_tccount32_write_CC_reg(hw, 1, _tcs[i].cc1);
} else if ((_tcs[i].ctrl_a & TC_CTRLA_MODE_Msk) == TC_CTRLA_MODE_COUNT16) {
hri_tccount16_write_CC_reg(hw, 0, (uint16_t)_tcs[i].cc0);
hri_tccount16_write_CC_reg(hw, 1, (uint16_t)_tcs[i].cc1);
} else if ((_tcs[i].ctrl_a & TC_CTRLA_MODE_Msk) == TC_CTRLA_MODE_COUNT8) {
hri_tccount8_write_CC_reg(hw, 0, (uint8_t)_tcs[i].cc0);
hri_tccount8_write_CC_reg(hw, 1, (uint8_t)_tcs[i].cc1);
hri_tccount8_write_PER_reg(hw, _tcs[i].per);
}
hri_tc_set_INTEN_OVF_bit(hw);
_tc_init_irq_param(hw, (void *)device);
NVIC_DisableIRQ(_tcs[i].irq);
NVIC_ClearPendingIRQ(_tcs[i].irq);
NVIC_EnableIRQ(_tcs[i].irq);
return ERR_NONE;
}
/**
* \brief Initialize TC for PWM mode
*/
@ -232,20 +184,6 @@ int32_t _tc_pwm_init(struct _pwm_device *const device, void *const hw)
return 0;
}
/**
* \brief De-initialize TC
*/
void _timer_deinit(struct _timer_device *const device)
{
void *const hw = device->hw;
int8_t i = get_tc_index(hw);
ASSERT(ARRAY_SIZE(_tcs));
NVIC_DisableIRQ(_tcs[i].irq);
hri_tc_clear_CTRLA_ENABLE_bit(hw);
hri_tc_set_CTRLA_SWRST_bit(hw);
}
/**
* \brief De-initialize TC for PWM mode
*/
@ -260,13 +198,6 @@ void _tc_pwm_deinit(struct _pwm_device *const device)
hri_tc_clear_CTRLA_ENABLE_bit(hw);
hri_tc_set_CTRLA_SWRST_bit(hw);
}
/**
* \brief Start hardware timer
*/
void _timer_start(struct _timer_device *const device)
{
hri_tc_set_CTRLA_ENABLE_bit(device->hw);
}
/**
* \brief Start PWM
*/
@ -274,13 +205,6 @@ void _tc_start_pwm(struct _pwm_device *const device)
{
hri_tc_set_CTRLA_ENABLE_bit(device->hw);
}
/**
* \brief Stop hardware timer
*/
void _timer_stop(struct _timer_device *const device)
{
hri_tc_clear_CTRLA_ENABLE_bit(device->hw);
}
/**
* \brief Stop PWM
*/
@ -288,21 +212,6 @@ void _tc_stop_pwm(struct _pwm_device *const device)
{
hri_tc_clear_CTRLA_ENABLE_bit(device->hw);
}
/**
* \brief Set timer period
*/
void _timer_set_period(struct _timer_device *const device, const uint32_t clock_cycles)
{
void *const hw = device->hw;
if (TC_CTRLA_MODE_COUNT32_Val == hri_tc_read_CTRLA_MODE_bf(hw)) {
hri_tccount32_write_CC_reg(hw, 0, clock_cycles);
} else if (TC_CTRLA_MODE_COUNT16_Val == hri_tc_read_CTRLA_MODE_bf(hw)) {
hri_tccount16_write_CC_reg(hw, 0, (uint16_t)clock_cycles);
} else if (TC_CTRLA_MODE_COUNT8_Val == hri_tc_read_CTRLA_MODE_bf(hw)) {
hri_tccount8_write_PER_reg(hw, clock_cycles);
}
}
/**
* \brief Set PWM parameter
*/
@ -355,30 +264,6 @@ uint32_t _tc_pwm_get_duty(const struct _pwm_device *const device)
return ((duty_cycle * 1000) / per);
}
/**
* \brief Retrieve timer period
*/
uint32_t _timer_get_period(const struct _timer_device *const device)
{
void *const hw = device->hw;
if (TC_CTRLA_MODE_COUNT32_Val == hri_tc_read_CTRLA_MODE_bf(hw)) {
return hri_tccount32_read_CC_reg(hw, 0);
} else if (TC_CTRLA_MODE_COUNT16_Val == hri_tc_read_CTRLA_MODE_bf(hw)) {
return hri_tccount16_read_CC_reg(hw, 0);
} else if (TC_CTRLA_MODE_COUNT8_Val == hri_tc_read_CTRLA_MODE_bf(hw)) {
return hri_tccount8_read_PER_reg(hw);
}
return 0;
}
/**
* \brief Check if timer is running
*/
bool _timer_is_started(const struct _timer_device *const device)
{
return hri_tc_get_CTRLA_ENABLE_bit(device->hw);
}
/**
* \brief Check if PWM is running
*/
@ -415,33 +300,6 @@ struct _pwm_hpl_interface *_tc_get_pwm(void)
{
return &_tc_pwm_functions;
}
/**
* \brief Set timer IRQ
*
* \param[in] hw The pointer to hardware instance
*/
void _timer_set_irq(struct _timer_device *const device)
{
void *const hw = device->hw;
int8_t i = get_tc_index(hw);
ASSERT(ARRAY_SIZE(_tcs));
_irq_set(_tcs[i].irq);
}
/**
* \internal TC interrupt handler for Timer
*
* \param[in] instance TC instance number
*/
static void tc_interrupt_handler(struct _timer_device *device)
{
void *const hw = device->hw;
if (hri_tc_get_interrupt_OVF_bit(hw)) {
hri_tc_clear_interrupt_OVF_bit(hw);
device->timer_cb.period_expired(device);
}
}
/**
* \internal TC interrupt handler for PWM
*
@ -465,14 +323,6 @@ static void tc_pwm_interrupt_handler(struct _pwm_device *device)
}
}
/**
* \brief TC interrupt handler
*/
void TC0_Handler(void)
{
tc_interrupt_handler(_tc0_dev);
}
/**
* \brief TC interrupt handler
*/
@ -508,9 +358,6 @@ static int8_t get_tc_index(const void *const hw)
*/
static void _tc_init_irq_param(const void *const hw, void *dev)
{
if (hw == TC0) {
_tc0_dev = (struct _timer_device *)dev;
}
if (hw == TC3) {
_tc3_dev = (struct _pwm_device *)dev;
}

View file

@ -29,9 +29,11 @@ static void light_callback() {
static void alarm_callback() {
}
int lightOn = 0;
static void tick_callback() {
gpio_set_pin_level(GREEN, true);
gpio_set_pin_level(GREEN, false);
gpio_set_pin_level(GREEN, lightOn == 0);
lightOn = (lightOn + 1) % 10;
}
int main(void)
@ -55,8 +57,6 @@ int main(void)
watch_register_button_callback(&watch, BTN_ALARM, &alarm_callback);
watch_register_button_callback(&watch, BTN_LIGHT, &light_callback);
watch_enable_tick(tick_callback);
/*
watch_enable_date_time(&watch);
struct calendar_date_time date_time;
date_time.date.year = 2021;
@ -74,7 +74,8 @@ int main(void)
alarm.callback = calendar_callback;
update_display(&watch, date_time);
calendar_set_alarm(&CALENDAR_0, &alarm, &calendar_callback);
*/
watch_enable_tick(tick_callback);
while (1) {
sleep(2);
}

View file

@ -239,22 +239,14 @@ void watch_get_date_time(struct calendar_date_time *date_time) {
static ext_irq_cb_t tick_user_callback;
static void tick_callback(const struct timer_task *const timer_task) {
static void tick_callback(struct calendar_dev *const dev) {
tick_user_callback();
}
static struct timer_task tick_task;
void watch_enable_tick(ext_irq_cb_t callback) {
TIMER_0_init();
tick_task.interval = 16384;
tick_task.cb = tick_callback;
tick_task.mode = TIMER_TASK_REPEAT;
tick_user_callback = callback;
timer_add_task(&TIMER_0, &tick_task);
timer_start(&TIMER_0);
// TODO: rename this method to reflect that it now sets the PER7 interrupt.
_tamper_register_callback(&CALENDAR_0.device, &tick_callback);
}
void watch_enable_analog(Watch *watch, const uint8_t pin) {

View file

@ -11,9 +11,6 @@
#include <stdint.h>
#include "hpl_calendar.h"
#include "hal_ext_irq.h"
#include "hal_timer.h"
typedef void (*watch_tick_cb)(void);
typedef struct Watch {
bool display_enabled;