mirror of
https://github.com/firewalkwithm3/Sensor-Watch.git
synced 2024-11-22 19:20:30 +08:00
use atmel studio's startup and linker script
This commit is contained in:
parent
ce477fabaf
commit
e68086a087
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@ -1,82 +1,145 @@
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/*
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/**
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* Copyright (c) 2014-2016, Alex Taradov <alex@taradov.com>
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* \file
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* All rights reserved.
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* \brief Linker script for running in internal FLASH on the SAML22J18A
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* modification, are permitted provided that the following conditions are met:
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*
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* Copyright (c) 2018 Microchip Technology Inc.
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright
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* \asf_license_start
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* notice, this list of conditions and the following disclaimer in the
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*
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* documentation and/or other materials provided with the distribution.
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* \page License
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* 3. The name of the author may not be used to endorse or promote products
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*
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* derived from this software without specific prior written permission.
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License"); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the Licence at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an AS IS BASIS, WITHOUT
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||||||
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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||||||
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* limitations under the License.
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*
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||||||
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* \asf_license_stop
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*
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
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||||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
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||||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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*/
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OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
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OUTPUT_ARCH(arm)
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SEARCH_DIR(.)
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/* Memory Spaces Definitions */
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MEMORY
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MEMORY
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{
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{
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flash (rx) : ORIGIN = 0x00000000+0x2000, LENGTH = 0x00040000-0x2000 /* 256k */
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rom (rx) : ORIGIN = 0x2000, LENGTH = 0x00040000-0x2000
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ram (rwx) : ORIGIN = 0x20000000, LENGTH = 0x8000 /* 32k */
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ram (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000
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}
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}
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__top_flash = ORIGIN(flash) + LENGTH(flash);
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/* The stack size used by the application. NOTE: you need to adjust according to your application. */
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__top_ram = ORIGIN(ram) + LENGTH(ram);
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STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : DEFINED(__stack_size__) ? __stack_size__ : 0x2000;
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ENTRY(irq_handler_reset)
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ENTRY(Reset_Handler)
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/* Section Definitions */
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SECTIONS
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SECTIONS
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{
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{
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.text : ALIGN(4)
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.text :
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{
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{
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FILL(0xff)
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. = ALIGN(4);
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KEEP(*(.vectors))
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_sfixed = .;
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*(.text*)
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KEEP(*(.vectors .vectors.*))
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*(.rodata)
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*(.text .text.* .gnu.linkonce.t.*)
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*(.rodata.*)
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*(.glue_7t) *(.glue_7)
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*(.rodata .rodata* .gnu.linkonce.r.*)
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*(.ARM.extab* .gnu.linkonce.armextab.*)
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/* Support C constructors, and C destructors in both user code
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and the C library. This also provides support for C++ code. */
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. = ALIGN(4);
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KEEP(*(.init))
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. = ALIGN(4);
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__preinit_array_start = .;
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KEEP (*(.preinit_array))
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__preinit_array_end = .;
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. = ALIGN(4);
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__init_array_start = .;
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KEEP (*(SORT(.init_array.*)))
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KEEP (*(.init_array))
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__init_array_end = .;
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. = ALIGN(4);
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KEEP (*crtbegin.o(.ctors))
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KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
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KEEP (*(SORT(.ctors.*)))
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KEEP (*crtend.o(.ctors))
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. = ALIGN(4);
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KEEP(*(.fini))
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. = ALIGN(4);
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__fini_array_start = .;
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KEEP (*(.fini_array))
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KEEP (*(SORT(.fini_array.*)))
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__fini_array_end = .;
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KEEP (*crtbegin.o(.dtors))
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KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
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KEEP (*(SORT(.dtors.*)))
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KEEP (*crtend.o(.dtors))
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. = ALIGN(4);
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_efixed = .; /* End of text section */
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} > rom
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/* .ARM.exidx is sorted, so has to go in its own output section. */
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PROVIDE_HIDDEN (__exidx_start = .);
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.ARM.exidx :
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{
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*(.ARM.exidx* .gnu.linkonce.armexidx.*)
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} > rom
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PROVIDE_HIDDEN (__exidx_end = .);
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. = ALIGN(4);
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. = ALIGN(4);
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} > flash
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_etext = .;
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. = ALIGN(4);
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.relocate : AT (_etext)
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_etext = .;
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{
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. = ALIGN(4);
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_srelocate = .;
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*(.ramfunc .ramfunc.*);
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*(.data .data.*);
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. = ALIGN(4);
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_erelocate = .;
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} > ram
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.uninit_RESERVED : ALIGN(4)
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/* .bss section which is used for uninitialized data */
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{
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.bss (NOLOAD) :
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KEEP(*(.bss.$RESERVED*))
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{
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} > ram
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. = ALIGN(4);
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_sbss = . ;
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_szero = .;
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*(.bss .bss.*)
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*(COMMON)
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. = ALIGN(4);
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_ebss = . ;
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_ezero = .;
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} > ram
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/* stack section */
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.stack (NOLOAD):
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{
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. = ALIGN(8);
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_sstack = .;
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. = . + STACK_SIZE;
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. = ALIGN(8);
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_estack = .;
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} > ram
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.data : ALIGN(4)
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{
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FILL(0xff)
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_data = .;
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*(.ramfunc .ramfunc.*);
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*(vtable)
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*(.data*)
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. = ALIGN(4);
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. = ALIGN(4);
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_edata = .;
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_end = . ;
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} > ram AT > flash
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.bss : ALIGN(4)
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{
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_bss = .;
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*(.bss*)
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*(COMMON)
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. = ALIGN(4);
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_ebss = .;
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PROVIDE(_end = .);
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} > ram
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PROVIDE(_stack_top = __top_ram - 0);
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}
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}
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@ -36,139 +36,69 @@
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#include "hal_gpio.h"
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#include "hal_gpio.h"
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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#define PERIOD_FAST 100
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#define PERIOD_SLOW 500
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HAL_GPIO_PIN(LED, A, 21)
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HAL_GPIO_PIN(LED, A, 21)
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HAL_GPIO_PIN(BUTTON, A, 30)
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HAL_GPIO_PIN(UART_TX, B, 0)
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HAL_GPIO_PIN(UART_TX, B, 0)
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HAL_GPIO_PIN(UART_RX, B, 2)
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HAL_GPIO_PIN(UART_RX, B, 2)
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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static void timer_set_period(uint16_t i)
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static void uart_init(uint32_t baud) {
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{
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uint64_t br = (uint64_t)65536 * (F_CPU - 16 * baud) / F_CPU;
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TC3->COUNT16.CC[0].reg = (F_CPU / 1000ul / 256) * i;
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TC3->COUNT16.COUNT.reg = 0;
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HAL_GPIO_UART_TX_out();
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HAL_GPIO_UART_TX_pmuxen(HAL_GPIO_PMUX_C);
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HAL_GPIO_UART_RX_in();
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HAL_GPIO_UART_RX_pmuxen(HAL_GPIO_PMUX_C);
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MCLK->APBCMASK.reg |= MCLK_APBCMASK_SERCOM3;
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GCLK->PCHCTRL[SERCOM3_GCLK_ID_CORE].reg = GCLK_PCHCTRL_GEN(0) | GCLK_PCHCTRL_CHEN;
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while (0 == (GCLK->PCHCTRL[SERCOM3_GCLK_ID_CORE].reg & GCLK_PCHCTRL_CHEN));
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SERCOM3->USART.CTRLA.reg =
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SERCOM_USART_CTRLA_DORD | SERCOM_USART_CTRLA_MODE(1/*USART_INT_CLK*/) |
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SERCOM_USART_CTRLA_RXPO(0/*PAD0*/) | SERCOM_USART_CTRLA_TXPO(1/*PAD2*/);
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SERCOM3->USART.CTRLB.reg = SERCOM_USART_CTRLB_RXEN | SERCOM_USART_CTRLB_TXEN |
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SERCOM_USART_CTRLB_CHSIZE(0/*8 bits*/);
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SERCOM3->USART.BAUD.reg = (uint16_t)br;
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SERCOM3->USART.CTRLA.reg |= SERCOM_USART_CTRLA_ENABLE;
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}
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}
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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void irq_handler_tc3(void)
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static void uart_putc(char c) {
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{
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while (!(SERCOM3->USART.INTFLAG.reg & SERCOM_USART_INTFLAG_DRE));
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if (TC3->COUNT16.INTFLAG.reg & TC_INTFLAG_MC(1))
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SERCOM3->USART.DATA.reg = c;
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{
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HAL_GPIO_LED_toggle();
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TC3->COUNT16.INTFLAG.reg = TC_INTFLAG_MC(1);
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}
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}
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}
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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static void timer_init(void)
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static void uart_puts(char *s) {
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{
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while (*s) uart_putc(*s++);
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MCLK->APBCMASK.reg |= MCLK_APBCMASK_TC3;
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GCLK->PCHCTRL[TC3_GCLK_ID].reg = GCLK_PCHCTRL_GEN(0) | GCLK_PCHCTRL_CHEN;
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while (0 == (GCLK->PCHCTRL[TC3_GCLK_ID].reg & GCLK_PCHCTRL_CHEN));
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TC3->COUNT16.CTRLA.reg = TC_CTRLA_MODE_COUNT16 | TC_CTRLA_PRESCALER(6/*DIV256*/) |
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TC_CTRLA_PRESCSYNC_RESYNC;
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TC3->COUNT16.WAVE.reg = TC_WAVE_WAVEGEN_MFRQ;
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TC3->COUNT16.COUNT.reg = 0;
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timer_set_period(PERIOD_SLOW);
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TC3->COUNT16.CTRLA.reg |= TC_CTRLA_ENABLE;
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TC3->COUNT16.INTENSET.reg = TC_INTENSET_MC(1);
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NVIC_EnableIRQ(TC3_IRQn);
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}
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}
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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static void uart_init(uint32_t baud)
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static void sys_init(void) {
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{
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// Switch to 16MHz clock (disable prescaler)
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uint64_t br = (uint64_t)65536 * (F_CPU - 16 * baud) / F_CPU;
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OSCCTRL->OSC16MCTRL.reg = OSCCTRL_OSC16MCTRL_ENABLE | OSCCTRL_OSC16MCTRL_FSEL_16;
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// Switch to the highest performance level
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HAL_GPIO_UART_TX_out();
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PM->INTFLAG.reg = PM_INTFLAG_PLRDY;
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HAL_GPIO_UART_TX_pmuxen(HAL_GPIO_PMUX_C);
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PM->PLCFG.reg = PM_PLCFG_PLSEL_PL2_Val;
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HAL_GPIO_UART_RX_in();
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while (!PM->INTFLAG.reg);
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HAL_GPIO_UART_RX_pmuxen(HAL_GPIO_PMUX_C);
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|
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MCLK->APBCMASK.reg |= MCLK_APBCMASK_SERCOM3;
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|
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GCLK->PCHCTRL[SERCOM3_GCLK_ID_CORE].reg = GCLK_PCHCTRL_GEN(0) | GCLK_PCHCTRL_CHEN;
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while (0 == (GCLK->PCHCTRL[SERCOM3_GCLK_ID_CORE].reg & GCLK_PCHCTRL_CHEN));
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|
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SERCOM3->USART.CTRLA.reg =
|
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SERCOM_USART_CTRLA_DORD | SERCOM_USART_CTRLA_MODE(1/*USART_INT_CLK*/) |
|
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SERCOM_USART_CTRLA_RXPO(0/*PAD0*/) | SERCOM_USART_CTRLA_TXPO(1/*PAD2*/);
|
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||||||
|
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SERCOM3->USART.CTRLB.reg = SERCOM_USART_CTRLB_RXEN | SERCOM_USART_CTRLB_TXEN |
|
|
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SERCOM_USART_CTRLB_CHSIZE(0/*8 bits*/);
|
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||||||
|
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SERCOM3->USART.BAUD.reg = (uint16_t)br;
|
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|
|
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SERCOM3->USART.CTRLA.reg |= SERCOM_USART_CTRLA_ENABLE;
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|
||||||
}
|
}
|
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|
|
||||||
//-----------------------------------------------------------------------------
|
//-----------------------------------------------------------------------------
|
||||||
static void uart_putc(char c)
|
int main(void) {
|
||||||
{
|
sys_init();
|
||||||
while (!(SERCOM3->USART.INTFLAG.reg & SERCOM_USART_INTFLAG_DRE));
|
uart_init(115200);
|
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SERCOM3->USART.DATA.reg = c;
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HAL_GPIO_LED_out();
|
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}
|
HAL_GPIO_LED_set();
|
||||||
|
|
||||||
//-----------------------------------------------------------------------------
|
uart_puts("\r\nHello, world!\r\n");
|
||||||
static void uart_puts(char *s)
|
|
||||||
{
|
|
||||||
while (*s)
|
|
||||||
uart_putc(*s++);
|
|
||||||
}
|
|
||||||
|
|
||||||
//-----------------------------------------------------------------------------
|
while (1) {
|
||||||
static void sys_init(void)
|
uart_putc('.');
|
||||||
{
|
|
||||||
// Switch to 16MHz clock (disable prescaler)
|
|
||||||
OSCCTRL->OSC16MCTRL.reg = OSCCTRL_OSC16MCTRL_ENABLE | OSCCTRL_OSC16MCTRL_FSEL_16;
|
|
||||||
|
|
||||||
// Switch to the highest performance level
|
|
||||||
PM->INTFLAG.reg = PM_INTFLAG_PLRDY;
|
|
||||||
PM->PLCFG.reg = PM_PLCFG_PLSEL_PL2_Val;
|
|
||||||
while (!PM->INTFLAG.reg);
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|
||||||
}
|
|
||||||
|
|
||||||
//-----------------------------------------------------------------------------
|
|
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int main(void)
|
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||||||
{
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uint32_t cnt = 0;
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||||||
bool fast = false;
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||||||
|
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sys_init();
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timer_init();
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uart_init(115200);
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|
|
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uart_puts("\r\nHello, world!\r\n");
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|
|
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HAL_GPIO_LED_out();
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HAL_GPIO_LED_clr();
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|
|
||||||
HAL_GPIO_BUTTON_in();
|
|
||||||
HAL_GPIO_BUTTON_pullup();
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||||||
|
|
||||||
while (1)
|
|
||||||
{
|
|
||||||
if (HAL_GPIO_BUTTON_read())
|
|
||||||
cnt = 0;
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|
||||||
else if (cnt < 5001)
|
|
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cnt++;
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|
||||||
|
|
||||||
if (5000 == cnt)
|
|
||||||
{
|
|
||||||
fast = !fast;
|
|
||||||
timer_set_period(fast ? PERIOD_FAST : PERIOD_SLOW);
|
|
||||||
uart_putc('.');
|
|
||||||
}
|
}
|
||||||
}
|
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
|
@ -1,156 +1,225 @@
|
||||||
/*
|
/**
|
||||||
* Copyright (c) 2014-2017, Alex Taradov <alex@taradov.com>
|
* \file
|
||||||
* All rights reserved.
|
|
||||||
*
|
*
|
||||||
* Redistribution and use in source and binary forms, with or without
|
* \brief gcc starttup file for SAML22
|
||||||
* modification, are permitted provided that the following conditions are met:
|
|
||||||
*
|
*
|
||||||
* 1. Redistributions of source code must retain the above copyright notice,
|
* Copyright (c) 2018 Microchip Technology Inc.
|
||||||
* this list of conditions and the following disclaimer.
|
*
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright
|
* \asf_license_start
|
||||||
* notice, this list of conditions and the following disclaimer in the
|
*
|
||||||
* documentation and/or other materials provided with the distribution.
|
* \page License
|
||||||
* 3. The name of the author may not be used to endorse or promote products
|
*
|
||||||
* derived from this software without specific prior written permission.
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
|
*
|
||||||
|
* Licensed under the Apache License, Version 2.0 (the "License"); you may
|
||||||
|
* not use this file except in compliance with the License.
|
||||||
|
* You may obtain a copy of the Licence at
|
||||||
|
*
|
||||||
|
* http://www.apache.org/licenses/LICENSE-2.0
|
||||||
|
*
|
||||||
|
* Unless required by applicable law or agreed to in writing, software
|
||||||
|
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||||
|
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||||
|
* See the License for the specific language governing permissions and
|
||||||
|
* limitations under the License.
|
||||||
|
*
|
||||||
|
* \asf_license_stop
|
||||||
*
|
*
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
||||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
|
||||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
|
||||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
|
||||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
|
||||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
|
||||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
|
||||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
|
||||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
|
||||||
* POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
*/
|
*/
|
||||||
|
|
||||||
//-----------------------------------------------------------------------------
|
|
||||||
#include "saml22.h"
|
#include "saml22.h"
|
||||||
|
|
||||||
//-----------------------------------------------------------------------------
|
/* Initialize segments */
|
||||||
#define DUMMY __attribute__ ((weak, alias ("irq_handler_dummy")))
|
extern uint32_t _sfixed;
|
||||||
|
extern uint32_t _efixed;
|
||||||
|
extern uint32_t _etext;
|
||||||
|
extern uint32_t _srelocate;
|
||||||
|
extern uint32_t _erelocate;
|
||||||
|
extern uint32_t _szero;
|
||||||
|
extern uint32_t _ezero;
|
||||||
|
extern uint32_t _sstack;
|
||||||
|
extern uint32_t _estack;
|
||||||
|
|
||||||
//-----------------------------------------------------------------------------
|
/** \cond DOXYGEN_SHOULD_SKIP_THIS */
|
||||||
void irq_handler_reset(void);
|
int main(void);
|
||||||
DUMMY void irq_handler_nmi(void);
|
/** \endcond */
|
||||||
DUMMY void irq_handler_hard_fault(void);
|
|
||||||
DUMMY void irq_handler_sv_call(void);
|
|
||||||
DUMMY void irq_handler_pend_sv(void);
|
|
||||||
DUMMY void irq_handler_sys_tick(void);
|
|
||||||
|
|
||||||
DUMMY void irq_handler_system(void);
|
void __libc_init_array(void);
|
||||||
DUMMY void irq_handler_wdt(void);
|
|
||||||
DUMMY void irq_handler_rtc(void);
|
|
||||||
DUMMY void irq_handler_eic(void);
|
|
||||||
DUMMY void irq_handler_freqm(void);
|
|
||||||
DUMMY void irq_handler_usb(void);
|
|
||||||
DUMMY void irq_handler_nvmctrl(void);
|
|
||||||
DUMMY void irq_handler_dmac(void);
|
|
||||||
DUMMY void irq_handler_evsys(void);
|
|
||||||
DUMMY void irq_handler_sercom0(void);
|
|
||||||
DUMMY void irq_handler_sercom1(void);
|
|
||||||
DUMMY void irq_handler_sercom2(void);
|
|
||||||
DUMMY void irq_handler_sercom3(void);
|
|
||||||
DUMMY void irq_handler_sercom4(void);
|
|
||||||
DUMMY void irq_handler_sercom5(void);
|
|
||||||
DUMMY void irq_handler_tcc0(void);
|
|
||||||
DUMMY void irq_handler_tc0(void);
|
|
||||||
DUMMY void irq_handler_tc1(void);
|
|
||||||
DUMMY void irq_handler_tc2(void);
|
|
||||||
DUMMY void irq_handler_tc3(void);
|
|
||||||
DUMMY void irq_handler_adc(void);
|
|
||||||
DUMMY void irq_handler_ac(void);
|
|
||||||
DUMMY void irq_handler_ptc(void);
|
|
||||||
DUMMY void irq_handler_slcd(void);
|
|
||||||
DUMMY void irq_handler_aes(void);
|
|
||||||
DUMMY void irq_handler_trng(void);
|
|
||||||
|
|
||||||
extern int main(void);
|
/* Default empty handler */
|
||||||
|
void Dummy_Handler(void);
|
||||||
|
|
||||||
extern void _stack_top(void);
|
/* Cortex-M0+ core handlers */
|
||||||
extern unsigned int _etext;
|
void NonMaskableInt_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
extern unsigned int _data;
|
void HardFault_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
extern unsigned int _edata;
|
void SVCall_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
extern unsigned int _bss;
|
void PendSV_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
extern unsigned int _ebss;
|
void SysTick_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
|
||||||
//-----------------------------------------------------------------------------
|
/* Peripherals handlers */
|
||||||
__attribute__ ((used, section(".vectors")))
|
void SYSTEM_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler"))); /* MCLK, OSC32KCTRL, OSCCTRL, PAC, PM, SUPC, TAL */
|
||||||
void (* const vectors[])(void) =
|
void WDT_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
{
|
void RTC_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
&_stack_top, // 0 - Initial Stack Pointer Value
|
void EIC_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void FREQM_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
#ifdef ID_USB
|
||||||
|
void USB_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
#endif
|
||||||
|
void NVMCTRL_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void DMAC_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void EVSYS_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void SERCOM0_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void SERCOM1_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void SERCOM2_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
#ifdef ID_SERCOM3
|
||||||
|
void SERCOM3_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
#endif
|
||||||
|
#ifdef ID_SERCOM4
|
||||||
|
void SERCOM4_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
#endif
|
||||||
|
#ifdef ID_SERCOM5
|
||||||
|
void SERCOM5_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
#endif
|
||||||
|
void TCC0_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void TC0_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void TC1_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void TC2_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void TC3_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void ADC_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
void AC_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
#ifdef ID_PTC
|
||||||
|
void PTC_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
#endif
|
||||||
|
void SLCD_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
#ifdef ID_AES
|
||||||
|
void AES_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
#endif
|
||||||
|
#ifdef ID_TRNG
|
||||||
|
void TRNG_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
|
||||||
|
#endif
|
||||||
|
|
||||||
// Cortex-M0+ handlers
|
/* Exception Table */
|
||||||
irq_handler_reset, // 1 - Reset
|
__attribute__ ((section(".vectors")))
|
||||||
irq_handler_nmi, // 2 - NMI
|
const DeviceVectors exception_table = {
|
||||||
irq_handler_hard_fault, // 3 - Hard Fault
|
|
||||||
0, // 4 - Reserved
|
|
||||||
0, // 5 - Reserved
|
|
||||||
0, // 6 - Reserved
|
|
||||||
0, // 7 - Reserved
|
|
||||||
0, // 8 - Reserved
|
|
||||||
0, // 9 - Reserved
|
|
||||||
0, // 10 - Reserved
|
|
||||||
irq_handler_sv_call, // 11 - SVCall
|
|
||||||
0, // 12 - Reserved
|
|
||||||
0, // 13 - Reserved
|
|
||||||
irq_handler_pend_sv, // 14 - PendSV
|
|
||||||
irq_handler_sys_tick, // 15 - SysTick
|
|
||||||
|
|
||||||
// Peripheral handlers
|
/* Configure Initial Stack Pointer, using linker-generated symbols */
|
||||||
irq_handler_system, // 0 - System Controller
|
.pvStack = (void*) (&_estack),
|
||||||
irq_handler_wdt, // 1 - Watchdog Timer
|
|
||||||
irq_handler_rtc, // 2 - Real-Time Counter
|
.pfnReset_Handler = (void*) Reset_Handler,
|
||||||
irq_handler_eic, // 3 - External Interrupt Controller
|
.pfnNonMaskableInt_Handler = (void*) NonMaskableInt_Handler,
|
||||||
irq_handler_freqm, // 4 - External Interrupt Controller
|
.pfnHardFault_Handler = (void*) HardFault_Handler,
|
||||||
irq_handler_usb, // 5 - Universal Serial Bus Controller
|
.pvReservedM12 = (void*) (0UL), /* Reserved */
|
||||||
irq_handler_nvmctrl, // 6 - Non-Volatile Memory Controller
|
.pvReservedM11 = (void*) (0UL), /* Reserved */
|
||||||
irq_handler_dmac, // 7 - Direct Memory Access Controller
|
.pvReservedM10 = (void*) (0UL), /* Reserved */
|
||||||
irq_handler_evsys, // 8 - Event System
|
.pvReservedM9 = (void*) (0UL), /* Reserved */
|
||||||
irq_handler_sercom0, // 9 - Serial Communication Interface 0
|
.pvReservedM8 = (void*) (0UL), /* Reserved */
|
||||||
irq_handler_sercom1, // 10 - Serial Communication Interface 1
|
.pvReservedM7 = (void*) (0UL), /* Reserved */
|
||||||
irq_handler_sercom2, // 11 - Serial Communication Interface 2
|
.pvReservedM6 = (void*) (0UL), /* Reserved */
|
||||||
irq_handler_sercom3, // 12 - Serial Communication Interface 3
|
.pfnSVCall_Handler = (void*) SVCall_Handler,
|
||||||
irq_handler_sercom4, // 13 - Serial Communication Interface 4
|
.pvReservedM4 = (void*) (0UL), /* Reserved */
|
||||||
irq_handler_sercom5, // 14 - Serial Communication Interface 5
|
.pvReservedM3 = (void*) (0UL), /* Reserved */
|
||||||
irq_handler_tcc0, // 15 - Timer/Counter for Control 0
|
.pfnPendSV_Handler = (void*) PendSV_Handler,
|
||||||
irq_handler_tc0, // 16 - Timer/Counter 0
|
.pfnSysTick_Handler = (void*) SysTick_Handler,
|
||||||
irq_handler_tc1, // 17 - Timer/Counter 1
|
|
||||||
irq_handler_tc2, // 18 - Timer/Counter 2
|
/* Configurable interrupts */
|
||||||
irq_handler_tc3, // 19 - Timer/Counter 3
|
.pfnSYSTEM_Handler = (void*) SYSTEM_Handler, /* 0 Main Clock, 32k Oscillators Control, Oscillators Control, Peripheral Access Controller, Power Manager, Supply Controller, Trigger Allocator */
|
||||||
irq_handler_adc, // 20 - Analog-to-Digital Converter
|
.pfnWDT_Handler = (void*) WDT_Handler, /* 1 Watchdog Timer */
|
||||||
irq_handler_ac, // 21 - Analog Comparator
|
.pfnRTC_Handler = (void*) RTC_Handler, /* 2 Real-Time Counter */
|
||||||
irq_handler_ptc, // 22 - Peripheral Touch Controller
|
.pfnEIC_Handler = (void*) EIC_Handler, /* 3 External Interrupt Controller */
|
||||||
irq_handler_slcd, // 23 - Segment Liquid Crystal Display Controller
|
.pfnFREQM_Handler = (void*) FREQM_Handler, /* 4 Frequency Meter */
|
||||||
irq_handler_aes, // 24 - Advanced Encryption Standard
|
#ifdef ID_USB
|
||||||
irq_handler_trng, // 25 - True Random Number Generator
|
.pfnUSB_Handler = (void*) USB_Handler, /* 5 Universal Serial Bus */
|
||||||
|
#else
|
||||||
|
.pvReserved5 = (void*) (0UL), /* 5 Reserved */
|
||||||
|
#endif
|
||||||
|
.pfnNVMCTRL_Handler = (void*) NVMCTRL_Handler, /* 6 Non-Volatile Memory Controller */
|
||||||
|
.pfnDMAC_Handler = (void*) DMAC_Handler, /* 7 Direct Memory Access Controller */
|
||||||
|
.pfnEVSYS_Handler = (void*) EVSYS_Handler, /* 8 Event System Interface */
|
||||||
|
.pfnSERCOM0_Handler = (void*) SERCOM0_Handler, /* 9 Serial Communication Interface 0 */
|
||||||
|
.pfnSERCOM1_Handler = (void*) SERCOM1_Handler, /* 10 Serial Communication Interface 1 */
|
||||||
|
.pfnSERCOM2_Handler = (void*) SERCOM2_Handler, /* 11 Serial Communication Interface 2 */
|
||||||
|
#ifdef ID_SERCOM3
|
||||||
|
.pfnSERCOM3_Handler = (void*) SERCOM3_Handler, /* 12 Serial Communication Interface 3 */
|
||||||
|
#else
|
||||||
|
.pvReserved12 = (void*) (0UL), /* 12 Reserved */
|
||||||
|
#endif
|
||||||
|
#ifdef ID_SERCOM4
|
||||||
|
.pfnSERCOM4_Handler = (void*) SERCOM4_Handler, /* 13 Serial Communication Interface 4 */
|
||||||
|
#else
|
||||||
|
.pvReserved13 = (void*) (0UL), /* 13 Reserved */
|
||||||
|
#endif
|
||||||
|
#ifdef ID_SERCOM5
|
||||||
|
.pfnSERCOM5_Handler = (void*) SERCOM5_Handler, /* 14 Serial Communication Interface 5 */
|
||||||
|
#else
|
||||||
|
.pvReserved14 = (void*) (0UL), /* 14 Reserved */
|
||||||
|
#endif
|
||||||
|
.pfnTCC0_Handler = (void*) TCC0_Handler, /* 15 Timer Counter Control */
|
||||||
|
.pfnTC0_Handler = (void*) TC0_Handler, /* 16 Basic Timer Counter 0 */
|
||||||
|
.pfnTC1_Handler = (void*) TC1_Handler, /* 17 Basic Timer Counter 1 */
|
||||||
|
.pfnTC2_Handler = (void*) TC2_Handler, /* 18 Basic Timer Counter 2 */
|
||||||
|
.pfnTC3_Handler = (void*) TC3_Handler, /* 19 Basic Timer Counter 3 */
|
||||||
|
.pfnADC_Handler = (void*) ADC_Handler, /* 20 Analog Digital Converter */
|
||||||
|
.pfnAC_Handler = (void*) AC_Handler, /* 21 Analog Comparators */
|
||||||
|
#ifdef ID_PTC
|
||||||
|
.pfnPTC_Handler = (void*) PTC_Handler, /* 22 Peripheral Touch Controller */
|
||||||
|
#else
|
||||||
|
.pvReserved22 = (void*) (0UL), /* 22 Reserved */
|
||||||
|
#endif
|
||||||
|
.pfnSLCD_Handler = (void*) SLCD_Handler, /* 23 Segment Liquid Crystal Display Controller */
|
||||||
|
#ifdef ID_AES
|
||||||
|
.pfnAES_Handler = (void*) AES_Handler, /* 24 Advanced Encryption Standard */
|
||||||
|
#else
|
||||||
|
.pvReserved24 = (void*) (0UL), /* 24 Reserved */
|
||||||
|
#endif
|
||||||
|
#ifdef ID_TRNG
|
||||||
|
.pfnTRNG_Handler = (void*) TRNG_Handler /* 25 True Random Generator */
|
||||||
|
#else
|
||||||
|
.pvReserved25 = (void*) (0UL) /* 25 Reserved */
|
||||||
|
#endif
|
||||||
};
|
};
|
||||||
|
|
||||||
//-----------------------------------------------------------------------------
|
/**
|
||||||
void irq_handler_reset(void)
|
* \brief This is the code that gets called on processor reset.
|
||||||
|
* To initialize the device, and call the main() routine.
|
||||||
|
*/
|
||||||
|
void Reset_Handler(void)
|
||||||
{
|
{
|
||||||
unsigned int *src, *dst;
|
uint32_t *pSrc, *pDest;
|
||||||
|
|
||||||
src = &_etext;
|
/* Initialize the relocate segment */
|
||||||
dst = &_data;
|
pSrc = &_etext;
|
||||||
while (dst < &_edata)
|
pDest = &_srelocate;
|
||||||
*dst++ = *src++;
|
|
||||||
|
|
||||||
dst = &_bss;
|
if (pSrc != pDest) {
|
||||||
while (dst < &_ebss)
|
for (; pDest < &_erelocate;) {
|
||||||
*dst++ = 0;
|
*pDest++ = *pSrc++;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
SCB->VTOR = (uint32_t)vectors;
|
/* Clear the zero segment */
|
||||||
|
for (pDest = &_szero; pDest < &_ezero;) {
|
||||||
|
*pDest++ = 0;
|
||||||
|
}
|
||||||
|
|
||||||
main();
|
/* Set the vector table base address */
|
||||||
|
pSrc = (uint32_t *) & _sfixed;
|
||||||
|
SCB->VTOR = ((uint32_t) pSrc & SCB_VTOR_TBLOFF_Msk);
|
||||||
|
|
||||||
while (1);
|
/* Initialize the C library */
|
||||||
|
__libc_init_array();
|
||||||
|
|
||||||
|
/* Branch to main function */
|
||||||
|
main();
|
||||||
|
|
||||||
|
/* Infinite loop */
|
||||||
|
while (1);
|
||||||
}
|
}
|
||||||
|
|
||||||
//-----------------------------------------------------------------------------
|
/**
|
||||||
void irq_handler_dummy(void)
|
* \brief Default interrupt handler for unused IRQs.
|
||||||
|
*/
|
||||||
|
void Dummy_Handler(void)
|
||||||
{
|
{
|
||||||
while (1);
|
while (1) {
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
Loading…
Reference in a new issue