mirror of
https://github.com/firewalkwithm3/Sensor-Watch.git
synced 2024-11-23 03:30:30 +08:00
304 lines
9.1 KiB
C
304 lines
9.1 KiB
C
/* Auto-generated config file hpl_sercom_config.h */
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#ifndef HPL_SERCOM_CONFIG_H
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#define HPL_SERCOM_CONFIG_H
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// <<< Use Configuration Wizard in Context Menu >>>
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#include <peripheral_clk_config.h>
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#ifndef SERCOM_I2CM_CTRLA_MODE_I2C_MASTER
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#define SERCOM_I2CM_CTRLA_MODE_I2C_MASTER (5 << 2)
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#endif
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#ifndef CONF_SERCOM_1_I2CM_ENABLE
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#define CONF_SERCOM_1_I2CM_ENABLE 1
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#endif
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// <h> Basic
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// <o> I2C Bus clock speed (Hz) <1-400000>
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// <i> I2C Bus clock (SCL) speed measured in Hz
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// <id> i2c_master_baud_rate
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#ifndef CONF_SERCOM_1_I2CM_BAUD
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#define CONF_SERCOM_1_I2CM_BAUD 100000
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#endif
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// </h>
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// <e> Advanced
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// <id> i2c_master_advanced
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#ifndef CONF_SERCOM_1_I2CM_ADVANCED_CONFIG
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#define CONF_SERCOM_1_I2CM_ADVANCED_CONFIG 0
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#endif
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// <o> TRise (ns) <0-300>
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// <i> Determined by the bus impedance, check electric characteristics in the datasheet
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// <i> Standard Fast Mode: typical 215ns, max 300ns
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// <i> Fast Mode +: typical 60ns, max 100ns
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// <i> High Speed Mode: typical 20ns, max 40ns
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// <id> i2c_master_arch_trise
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#ifndef CONF_SERCOM_1_I2CM_TRISE
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#define CONF_SERCOM_1_I2CM_TRISE 215
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#endif
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// <q> Master SCL Low Extended Time-Out (MEXTTOEN)
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// <i> This enables the master SCL low extend time-out
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// <id> i2c_master_arch_mexttoen
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#ifndef CONF_SERCOM_1_I2CM_MEXTTOEN
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#define CONF_SERCOM_1_I2CM_MEXTTOEN 0
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#endif
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// <q> Slave SCL Low Extend Time-Out (SEXTTOEN)
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// <i> Enables the slave SCL low extend time-out. If SCL is cumulatively held low for greater than 25ms from the initial START to a STOP, the slave will release its clock hold if enabled and reset the internal state machine
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// <id> i2c_master_arch_sexttoen
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#ifndef CONF_SERCOM_1_I2CM_SEXTTOEN
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#define CONF_SERCOM_1_I2CM_SEXTTOEN 0
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#endif
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// <q> SCL Low Time-Out (LOWTOUT)
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// <i> Enables SCL low time-out. If SCL is held low for 25ms-35ms, the master will release it's clock hold
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// <id> i2c_master_arch_lowtout
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#ifndef CONF_SERCOM_1_I2CM_LOWTOUT
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#define CONF_SERCOM_1_I2CM_LOWTOUT 0
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#endif
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// <o> Inactive Time-Out (INACTOUT)
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// <0x0=>Disabled
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// <0x1=>5-6 SCL cycle time-out(50-60us)
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// <0x2=>10-11 SCL cycle time-out(100-110us)
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// <0x3=>20-21 SCL cycle time-out(200-210us)
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// <i> Defines if inactivity time-out should be enabled, and how long the time-out should be
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// <id> i2c_master_arch_inactout
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#ifndef CONF_SERCOM_1_I2CM_INACTOUT
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#define CONF_SERCOM_1_I2CM_INACTOUT 0x0
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#endif
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// <o> SDA Hold Time (SDAHOLD)
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// <0=>Disabled
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// <1=>50-100ns hold time
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// <2=>300-600ns hold time
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// <3=>400-800ns hold time
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// <i> Defines the SDA hold time with respect to the negative edge of SCL
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// <id> i2c_master_arch_sdahold
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#ifndef CONF_SERCOM_1_I2CM_SDAHOLD
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#define CONF_SERCOM_1_I2CM_SDAHOLD 0x2
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#endif
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// <q> Run in stand-by
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// <i> Determine if the module shall run in standby sleep mode
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// <id> i2c_master_arch_runstdby
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#ifndef CONF_SERCOM_1_I2CM_RUNSTDBY
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#define CONF_SERCOM_1_I2CM_RUNSTDBY 0
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#endif
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// <o> Debug Stop Mode
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// <i> Behavior of the baud-rate generator when CPU is halted by external debugger.
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// <0=>Keep running
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// <1=>Halt
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// <id> i2c_master_arch_dbgstop
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#ifndef CONF_SERCOM_1_I2CM_DEBUG_STOP_MODE
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#define CONF_SERCOM_1_I2CM_DEBUG_STOP_MODE 0
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#endif
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// </e>
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#ifndef CONF_SERCOM_1_I2CM_SPEED
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#define CONF_SERCOM_1_I2CM_SPEED 0x00 // Speed: Standard/Fast mode
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#endif
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#if CONF_SERCOM_1_I2CM_TRISE < 215 || CONF_SERCOM_1_I2CM_TRISE > 300
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#warning Bad I2C Rise time for Standard/Fast mode, reset to 215ns
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#undef CONF_SERCOM_1_I2CM_TRISE
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#define CONF_SERCOM_1_I2CM_TRISE 215U
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#endif
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// gclk_freq - (i2c_scl_freq * 10) - (gclk_freq * i2c_scl_freq * Trise)
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// BAUD + BAUDLOW = --------------------------------------------------------------------
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// i2c_scl_freq
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// BAUD: register value low [7:0]
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// BAUDLOW: register value high [15:8], only used for odd BAUD + BAUDLOW
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#define CONF_SERCOM_1_I2CM_BAUD_BAUDLOW \
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(((CONF_GCLK_SERCOM1_CORE_FREQUENCY - (CONF_SERCOM_1_I2CM_BAUD * 10U) \
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- (CONF_SERCOM_1_I2CM_TRISE * (CONF_SERCOM_1_I2CM_BAUD / 100U) * (CONF_GCLK_SERCOM1_CORE_FREQUENCY / 10000U) \
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/ 1000U)) \
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* 10U \
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+ 5U) \
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/ (CONF_SERCOM_1_I2CM_BAUD * 10U))
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#ifndef CONF_SERCOM_1_I2CM_BAUD_RATE
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#if CONF_SERCOM_1_I2CM_BAUD_BAUDLOW > (0xFF * 2)
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#warning Requested I2C baudrate too low, please check
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#define CONF_SERCOM_1_I2CM_BAUD_RATE 0xFF
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#elif CONF_SERCOM_1_I2CM_BAUD_BAUDLOW <= 1
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#warning Requested I2C baudrate too high, please check
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#define CONF_SERCOM_1_I2CM_BAUD_RATE 1
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#else
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#define CONF_SERCOM_1_I2CM_BAUD_RATE \
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((CONF_SERCOM_1_I2CM_BAUD_BAUDLOW & 0x1) \
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? (CONF_SERCOM_1_I2CM_BAUD_BAUDLOW / 2) + ((CONF_SERCOM_1_I2CM_BAUD_BAUDLOW / 2 + 1) << 8) \
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: (CONF_SERCOM_1_I2CM_BAUD_BAUDLOW / 2))
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#endif
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#endif
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#include <peripheral_clk_config.h>
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// Enable configuration of module
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#ifndef CONF_SERCOM_3_SPI_ENABLE
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#define CONF_SERCOM_3_SPI_ENABLE 1
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#endif
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// Set module in SPI Master mode
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#ifndef CONF_SERCOM_3_SPI_MODE
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#define CONF_SERCOM_3_SPI_MODE 0x03
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#endif
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// <h> Basic Configuration
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// <q> Receive buffer enable
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// <i> Enable receive buffer to receive data from slave (RXEN)
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// <id> spi_master_rx_enable
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#ifndef CONF_SERCOM_3_SPI_RXEN
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#define CONF_SERCOM_3_SPI_RXEN 0x1
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#endif
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// <o> Character Size
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// <i> Bit size for all characters sent over the SPI bus (CHSIZE)
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// <0x0=>8 bits
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// <0x1=>9 bits
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// <id> spi_master_character_size
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#ifndef CONF_SERCOM_3_SPI_CHSIZE
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#define CONF_SERCOM_3_SPI_CHSIZE 0x0
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#endif
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// <o> Baud rate <1-12000000>
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// <i> The SPI data transfer rate
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// <id> spi_master_baud_rate
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#ifndef CONF_SERCOM_3_SPI_BAUD
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#define CONF_SERCOM_3_SPI_BAUD 50000
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#endif
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// </h>
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// <e> Advanced Configuration
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// <id> spi_master_advanced
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#ifndef CONF_SERCOM_3_SPI_ADVANCED
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#define CONF_SERCOM_3_SPI_ADVANCED 1
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#endif
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// <o> Dummy byte <0x00-0x1ff>
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// <id> spi_master_dummybyte
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// <i> Dummy byte used when reading data from the slave without sending any data
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#ifndef CONF_SERCOM_3_SPI_DUMMYBYTE
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#define CONF_SERCOM_3_SPI_DUMMYBYTE 0x1ff
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#endif
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// <o> Data Order
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// <0=>MSB first
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// <1=>LSB first
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// <i> I least significant or most significant bit is shifted out first (DORD)
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// <id> spi_master_arch_dord
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#ifndef CONF_SERCOM_3_SPI_DORD
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#define CONF_SERCOM_3_SPI_DORD 0x0
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#endif
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// <o> Clock Polarity
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// <0=>SCK is low when idle
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// <1=>SCK is high when idle
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// <i> Determines if the leading edge is rising or falling with a corresponding opposite edge at the trailing edge. (CPOL)
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// <id> spi_master_arch_cpol
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#ifndef CONF_SERCOM_3_SPI_CPOL
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#define CONF_SERCOM_3_SPI_CPOL 0x0
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#endif
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// <o> Clock Phase
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// <0x0=>Sample input on leading edge
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// <0x1=>Sample input on trailing edge
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// <i> Determines if input data is sampled on leading or trailing SCK edge. (CPHA)
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// <id> spi_master_arch_cpha
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#ifndef CONF_SERCOM_3_SPI_CPHA
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#define CONF_SERCOM_3_SPI_CPHA 0x0
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#endif
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// <o> Immediate Buffer Overflow Notification
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// <i> Controls when OVF is asserted (IBON)
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// <0x0=>In data stream
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// <0x1=>On buffer overflow
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// <id> spi_master_arch_ibon
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#ifndef CONF_SERCOM_3_SPI_IBON
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#define CONF_SERCOM_3_SPI_IBON 0x0
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#endif
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// <q> Run in stand-by
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// <i> Module stays active in stand-by sleep mode. (RUNSTDBY)
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// <id> spi_master_arch_runstdby
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#ifndef CONF_SERCOM_3_SPI_RUNSTDBY
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#define CONF_SERCOM_3_SPI_RUNSTDBY 0x0
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#endif
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// <o> Debug Stop Mode
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// <i> Behavior of the baud-rate generator when CPU is halted by external debugger. (DBGSTOP)
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// <0=>Keep running
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// <1=>Halt
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// <id> spi_master_arch_dbgstop
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#ifndef CONF_SERCOM_3_SPI_DBGSTOP
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#define CONF_SERCOM_3_SPI_DBGSTOP 0
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#endif
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// </e>
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// Address mode disabled in master mode
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#ifndef CONF_SERCOM_3_SPI_AMODE_EN
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#define CONF_SERCOM_3_SPI_AMODE_EN 0
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#endif
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#ifndef CONF_SERCOM_3_SPI_AMODE
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#define CONF_SERCOM_3_SPI_AMODE 0
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#endif
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#ifndef CONF_SERCOM_3_SPI_ADDR
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#define CONF_SERCOM_3_SPI_ADDR 0
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#endif
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#ifndef CONF_SERCOM_3_SPI_ADDRMASK
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#define CONF_SERCOM_3_SPI_ADDRMASK 0
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#endif
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#ifndef CONF_SERCOM_3_SPI_SSDE
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#define CONF_SERCOM_3_SPI_SSDE 0
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#endif
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#ifndef CONF_SERCOM_3_SPI_MSSEN
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#define CONF_SERCOM_3_SPI_MSSEN 0x0
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#endif
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#ifndef CONF_SERCOM_3_SPI_PLOADEN
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#define CONF_SERCOM_3_SPI_PLOADEN 0
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#endif
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// <o> Receive Data Pinout
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// <0x0=>PAD[0]
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// <0x1=>PAD[1]
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// <0x2=>PAD[2]
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// <0x3=>PAD[3]
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// <id> spi_master_rxpo
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#ifndef CONF_SERCOM_3_SPI_RXPO
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#define CONF_SERCOM_3_SPI_RXPO 2
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#endif
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// <o> Transmit Data Pinout
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// <0x0=>PAD[0,1]_DO_SCK
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// <0x1=>PAD[2,3]_DO_SCK
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// <0x2=>PAD[3,1]_DO_SCK
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// <0x3=>PAD[0,3]_DO_SCK
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// <id> spi_master_txpo
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#ifndef CONF_SERCOM_3_SPI_TXPO
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#define CONF_SERCOM_3_SPI_TXPO 3
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#endif
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// Calculate baud register value from requested baudrate value
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#ifndef CONF_SERCOM_3_SPI_BAUD_RATE
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#define CONF_SERCOM_3_SPI_BAUD_RATE ((float)CONF_GCLK_SERCOM3_CORE_FREQUENCY / (float)(2 * CONF_SERCOM_3_SPI_BAUD)) - 1
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#endif
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// <<< end of configuration section >>>
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#endif // HPL_SERCOM_CONFIG_H
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